Summary
Static random access memories are the primary form of embedded memories in the industry today. They have great utility and robustness. There are, however, many subtle analog effects that need be considered from both a design and a test perspective.
The sensing scheme, decoder circuitry, redundancy, and layout arrangements all bear on the other memories, which will be covered in the remainder of this text. Therefore, it is recommended a finger be kept in this chapter as one reads of the other memory designs. In multiple places the reader should refer back to the SRAM circuitry for detailed explanation. This has allowed the overall text to be shorter and the writing to be less pedantic.
SRAMs are easier to comprehend than most other memories because of their closeness to logic and therefore were covered first. Unique complexities due to technology, embedded logic, or other challenges will pervade the memories to be discussed in the next chapters. Thus, the SRAM is the standard in addition to being the workhorse of the industry. Comprehending the design and test challenges from an SRAM perspective will provide invaluable assistance in understanding other memories.
“Memories. You re talking about memories ...” movie Blade Runner
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© 2003 Kluwer Academic Publishers
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(2003). Static Random Access Memories. In: High Performance Memory Testing: Design Principles, Fault Modeling and Self-Test. Frontiers in Electronic Testing, vol 22A. Springer, Boston, MA. https://doi.org/10.1007/0-306-47972-9_2
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DOI: https://doi.org/10.1007/0-306-47972-9_2
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4020-7255-0
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