Summary
Block-level verification is essential when working with SOC designs. More and more, SOCs are using and reusing IPs. These IPs need to be verified early in the design process and during integration using the techniques that are described in this chapter.
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© 2002 Kluwer Academic Publishers
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(2002). Block-level Verification. In: System-on-a-Chip Verification. Springer, Boston, MA. https://doi.org/10.1007/0-306-46995-2_3
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DOI: https://doi.org/10.1007/0-306-46995-2_3
Publisher Name: Springer, Boston, MA
Print ISBN: 978-0-7923-7279-0
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