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Robust Computing with Nano-scale Devices

Progresses and Challenges

  • Chao┬áHuang

Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 58)

Table of contents

  1. Front Matter
    Pages i-viii
  2. Chao Huang
    Pages 1-5
  3. Bharat Joshi, Dhiraj K. Pradhan, Saraju P. Mohanty
    Pages 7-27
  4. Aiman H. El-Maleh, Bashir M. Al-Hashimi, Aissa Melouki, Ahmad Al-Yamani
    Pages 29-49
  5. Bipul C. Paul, Shinobu Fujita, Masaki Okajima, Thomas Lee
    Pages 99-123
  6. Supriyo Bandyopadhyay, Koray Karahaliloglu, Sridhar Patibandla
    Pages 125-136
  7. Michael Nicolaidis, Eleftherios Kolonis
    Pages 137-173
  8. Back Matter
    Pages 175-180

About this book

Introduction

Although complementary metal-oxide semiconductor (CMOS) technology will continue dominating the digital electronic circuits for the next 10-15 years, a number of grand challenges have emerged as the transistor size scales down. The rising costs of semiconductor mask and fabrication pose economic barriers to lithography. The quantum effects and increasing leakage power begin setting physical limits on continuous CMOS feature size shrinking.

The research advances of innovative nano-scale devices have created great opportunities to surpass the barriers faced by CMOS technology, which include nanowires, carbon nanotube transistors, programmable molecular switches, resonant tunneling diodes, quantum dots, etc.

However, the success of many nanotechnologies relies on the self-assembly fabrication process to fabricate circuits. The stochastic self-assembly fabrication, unfortunately, has low reliability with defect densities several orders of magnitude higher than conventional CMOS technology.

Robust Nano-Computing focuses on various issues of robust nano-computing, defect-tolerance design for nano-technology at different design abstraction levels. It addresses both redundancy- and configuration-based methods as well as fault detecting techniques through the development of accurate computation models and tools. The contents present an insightful view of the ongoing researches on nano-electronic devices, circuits, architectures, and design methods, as well as provide promising directions for future research.

Keywords

Circuit design method and architecture Fault tolerance Nano-computing Simulation and modeling calculus computer field-effect transistor logic modeling nano-scale nanotechnology networks reliability simulation transistor

Editors and affiliations

  • Chao┬áHuang
    • 1
  1. 1.Electical and Computer EngineeringVirginia TechBlacksburgU.S.A.

Bibliographic information

  • DOI https://doi.org/10.1007/978-90-481-8540-5
  • Copyright Information Springer Science+Business Media B.V. 2010
  • Publisher Name Springer, Dordrecht
  • eBook Packages Engineering
  • Print ISBN 978-90-481-8539-9
  • Online ISBN 978-90-481-8540-5
  • Series Print ISSN 1876-1100
  • Series Online ISSN 1876-1119
  • Buy this book on publisher's site
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