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Testing Disturbance Faults in Various NAND Flash Memories

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Abstract

NAND flash memory is one popular non-volatile memory. Flash memory is prone to disturbance faults due to its specific mechanism of functional operations. Furthermore, different NAND flash memories might be different on the array organizations and the supported functional operations. For example, some NAND flash memories can support the random program operation, but some cannot; some NAND flash memories with single-page wordlines and some with multiple-page wordlines. The differences on the array organizations and the functional operations result in the heavy influence on the testing of disturbance faults. In this paper, therefore, we analyze the disturbance faults for NAND flash memories with different array organizations and functional operations. Also, test algorithms for covering the disturbance faults in various types of NAND flash memories are proposed.

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Acknowledgments

This work is supported in part by National Science Council, Taiwan, R.O.C., under Contract NSC 101-2221-E-008-130-MY3 and NSC 102-2221-E-008-108-MY3. A portion of this work was published in the IEEE Asian Test Symposium (ATS), 2013.

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  1. Advanced Reliable Systems (ARES) Laboratory, Department of Electrical Engineering, National Central University, Jhongli, 320, Taiwan, Republic of China

    Chih-Sheng Hou & Jin-Fu Li

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  1. Chih-Sheng Hou
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  2. Jin-Fu Li
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Correspondence to Jin-Fu Li.

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Responsible Editor: J.-L. Huang

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Hou, CS., Li, JF. Testing Disturbance Faults in Various NAND Flash Memories. J Electron Test 30, 643–652 (2014). https://doi.org/10.1007/s10836-014-5487-z

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  • DOI: https://doi.org/10.1007/s10836-014-5487-z

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