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Application-Specific Processors

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Handbook of Hardware/Software Codesign

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Abstract

General-Purpose Processors (GPPs) and Application-Specific Integrated Circuits (ASICs) are the two extreme choices for computational engines. GPPs offer complete flexibility but are inefficient both in terms of performance and energy. In contrast, ASICs are highly energy-efficient, provide the best performance at the cost of zero flexibility. Application-specific processors or custom processors bridge the gap between these two alternatives by bringing in improved power-performance efficiency within the familiar software programming environment. An application-specific processor architecture augments the base instruction-set architecture with customized instructions that encapsulate the frequently occurring computational patterns within an application. These custom instructions are implemented in hardware enabling performance acceleration and energy benefits. The challenge lies in inventing automated tools that can design an application-specific processor by identifying and implementing custom instructions from the application software specified in high-level programming languages. In this chapter, we present the benefits of application-specific processors, their architecture, automated design flow, and the renewed interests in this class of architectures from energy-efficiency perspective.

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Abbreviations

ALU:

Arithmetic-Logic Unit

ASIC:

Application-Specific Integrated Circuit

BERET:

Bundled Execution of REcurring Traces

CAD:

Computer-Aided Design

CCA:

Configurable Compute Accelerator

CFG:

Control-Flow Graph

CFU:

Custom Functional Unit

CIS:

Custom Instruction-Set

DFG:

Data-Flow Graph

DISC:

Dynamic Instruction-Set Computer

DSP:

Digital Signal Processor

FPGA:

Field-Programmable Gate Array

GPP:

General-Purpose Processor

GPU:

Graphics Processing Unit

ILP:

Integer Linear Program

IR:

Intermediate Representation

ISA:

Instruction-Set Architecture

ISEF:

Stretch Instruction-Set Extension Fabric

MAC:

Multiply-Accumulator

MIMO:

Multiple Input Multiple Output

MISO:

Multiple Input Single Output

PFU:

Programmable Functional Unit

PRISC:

Programmable Instruction-Set Processor

RAM:

Random-Access Memory

RISC:

Reduced Instruction-Set Processor

RISPP:

Rotating Instruction-Set Processing Platform

SFU:

Specialized Functional Unit

VLIW:

Very Long Instruction Word

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Acknowledgements

This work was partially supported by Singapore Ministry of Education Academic Research Fund Tier 2 MOE2014-T2-2-129.

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Authors and Affiliations

  1. Department of Computer Science, School of Computing, National University of Singapore, 13 Computing Drive, 117417, Singapore, Singapore

    Tulika Mitra

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  1. Tulika Mitra
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Correspondence to Tulika Mitra .

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Editors and Affiliations

  1. Department of Computer Science and Engineering, Seoul National University, Seoul, Korea (Republic of)

    Soonhoi Ha

  2. Department of Computer Science, Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Erlangen, Germany

    Jürgen Teich

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Mitra, T. (2017). Application-Specific Processors. In: Ha, S., Teich, J. (eds) Handbook of Hardware/Software Codesign. Springer, Dordrecht. https://doi.org/10.1007/978-94-017-7267-9_13

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