Self-timed logic using Current-Sensing Completion Detection (CSCD) Mark E. DeanDavid L. DillMark Horowitz OriginalPaper 01 February 1994 Pages: 7 - 16
Performance of iterative computation in self-timed rings Ted E. Williams OriginalPaper 01 February 1994 Pages: 17 - 31
High-level optimizations in compiling process descriptions to asynchronous circuits Ganesh GopalakrishnanVenkatesh Akella OriginalPaper 01 February 1994 Pages: 33 - 45
Designing self-timed systems using concurrent programs Erik Brunvand OriginalPaper 01 February 1994 Pages: 47 - 59
Synthesis of hazard-free control circuits from asynchronous finite state machines specifications Tam-Anh Chu OriginalPaper 01 February 1994 Pages: 61 - 84
Specification, synthesis, and verification of hazard-free asynchronous circuits Cho W. MoonPaul R. StephanRobert K. Brayton OriginalPaper 01 February 1994 Pages: 85 - 100
A generalized state assignment theory for transformations on signal transition graphs Peter VanbekbergenBill LinHugo de Man OriginalPaper 01 February 1994 Pages: 101 - 115
Specification and analysis of self-timed circuits M. A. KishinevskyA. Yu. KondratyevA. R. Taubin OriginalPaper 01 February 1994 Pages: 117 - 135
Linear programming for hazard elimination in asynchronous circuits L. LavagnoN. ShenoyA. Sangiovanni-Vincentelli OriginalPaper 01 February 1994 Pages: 137 - 160
Verification of asynchronous interface circuits with bounded wire delays Srinivas DevadasKurt KeutzerAlbert Wang OriginalPaper 01 February 1994 Pages: 161 - 182