Power Analysis of a General Convolution Algorithm Mapped on a Linear Processor Array Rashindra ManniesingRichard KleihorstEmile Hendriks OriginalPaper 01 May 2004 Pages: 5 - 19
CORDIC Processor for Variable-Precision Interval Arithmetic Javier HormigoJulio VillalbaEmilio L. Zapata OriginalPaper 01 May 2004 Pages: 21 - 39
Fractional Rate Dataflow Model for Efficient Code Synthesis Hyunok OhSoonhoi Ha OriginalPaper 01 May 2004 Pages: 41 - 51
Combined Application of Data Transfer and Storage Optimizing Transformations and Subword Parallelism Exploitation for Power Consumption and Execution Time Reduction in VLIW Multimedia Processors K. MasselosF. CatthoorH. DeMan OriginalPaper 01 May 2004 Pages: 53 - 73
Introduction: Special Section on System Level Design Asim Smailagic Introduction 01 May 2004 Pages: 75 - 76
Design Considerations for Energy-Efficient Radios in Wireless Microsensor Networks Eugene ShihSeongHwan ChoAnantha Chandrakasan OriginalPaper 01 May 2004 Pages: 77 - 94
A Low-Power Heterogeneous Multiprocessor Architecture for Audio Signal Processing Özgün PakerJens SparsøLars Skovby Nielsen OriginalPaper 01 May 2004 Pages: 95 - 110
A Low Power Architecture for HASM Motion Tracking Wael BadawyMagdy Bayoumi OriginalPaper 01 May 2004 Pages: 111 - 127
Instruction Scheduling for Low Power A. ParikhSoontae KimM.J. Irwin OriginalPaper 01 May 2004 Pages: 129 - 149
Net Clustering Based Constructive and Iterative Improvement Approaches for Macro-Cell Placement Stelian AlupoaeiSrinivas Katkoori OriginalPaper 01 May 2004 Pages: 151 - 163