1. Guest Editorial

   • Mohammad Ibrahim
   • Earl Swartzlander

   Editorial Board 01 January 2003 Pages: 5 - 5

2. Further Reducing the Redundancy of a Notation Over a Minimally Redundant Digit Set

   • Marc Daumas
   • David W. Matula

   OriginalPaper 01 January 2003 Pages: 7 - 18

3. Fast CORDIC Algorithm Based on a New Recoding Scheme for Rotation Angles and Variable Scale Factors

   • Jen-Chuan Chih
   • Sau-Gee Chen

   OriginalPaper 01 January 2003 Pages: 19 - 29

4. On-the-Fly Range Reduction

   • Vincent Lefèvre
   • Jean-Michel Muller

   OriginalPaper 01 January 2003 Pages: 31 - 35

5. Error Analysis of the Kmetz/Maenner Algorithm

   • M. Arnold
   • T. Bailey
   • J. Cowles

   OriginalPaper 01 January 2003 Pages: 37 - 53

6. Multilevel Reverse-Carry Addition: Single and Dual Adders

   • J.D. Bruguera
   • T. Lang

   OriginalPaper 01 January 2003 Pages: 55 - 74

7. Reducing Switching Activity of Subtraction via Variable Truncation of the Most-Significant Bits

   • Vasily G. Moshnyaga

   OriginalPaper 01 January 2003 Pages: 75 - 82

8. Energy Efficient Adiabatic Multiplier-Accumulator Design

   • Dusan Suvakovic
   • C. Andre T. Salama

   OriginalPaper 01 January 2003 Pages: 83 - 103

9. Digit-Serial Complex-Number Multipliers on FPGAs

   • T. Sansaloni
   • J. Valls
   • K.K. Parhi

   OriginalPaper 01 January 2003 Pages: 105 - 115

10. A Radix-4 New Svobota-Tung Divider with Constant Timing Complexity for Prescaling

    • Jen-Shiun Chiang
    • Min-Shiou Tsai

    OriginalPaper 01 January 2003 Pages: 117 - 124

11. Implementation of the Exponential Function in a Floating-Point Unit

    • Álvaro Vázquez
    • Elisardo Antelo

    OriginalPaper 01 January 2003 Pages: 125 - 145

12. An Efficient IDCT Processor Design for HDTV Applications

    • Jiun-In Guo
    • Jui-Cheng Yen

    OriginalPaper 01 January 2003 Pages: 147 - 155

13. An Integrated Systolic Array Design for Video Compression

    • Pol Lin Tai
    • Chii Tung Liu
    • Jia Shung Wang

    OriginalPaper 01 January 2003 Pages: 157 - 169

14. Implementation of RNS-Based Distributed Arithmetic Discrete Wavelet Transform Architectures Using Field-Programmable Logic

    • Javier Ramírez
    • Antonio García
    • Antonio Lloris

    OriginalPaper 01 January 2003 Pages: 171 - 190

15. A Fully-Pipeline Linear Systolic Architecture for Modular Multiplier in Public-Key Crypto-Systems

    • Xingjun Wu
    • Hongyi Chen
    • Weixin Gai

    OriginalPaper 01 January 2003 Pages: 191 - 197

16. An RNS Architecture for Quasi-Chaotic Oscillators

    • M. Panella
    • G. Martinelli

    OriginalPaper 01 January 2003 Pages: 199 - 220