Measurement selection for parametric IC fault diagnosis Angus WuJack Meador Fault Diagnosis Pages: 9 - 18
Self-checking combinational circuit design for single and unidirectional multibit error Fadi Y. BusabaParag K. Lala Self-Checking Circuits Pages: 19 - 28
Design of a C-testable booth multiplier using a realistic fault model Jos Van SasChay NowéHugo De Man Design and Synthesis for Testability Pages: 29 - 41
Incorporating testability considerations in high-level synthesis Ashutosh MujumdarRajiv JainKewal Saluja Design and Synthesis for Testability Pages: 43 - 55
Energy minimization and design for testability Srimat T. ChakradharVishwani D. AgrawalMichael L. Bushnell Design and Synthesis for Testability Pages: 57 - 66
A class of two-dimensional cellular automata and their applications in random pattern testing D. Roy ChowdhuryI. SenguptaP. Pal Chaudhuri Built-In Self-Test Pages: 67 - 82
On minimizing aliasing in scan-based compaction Slawomir PilarskiAndré IvanovTiko Kameda Built-In Self-Test Pages: 83 - 90
Deterministic tests for detecting singleV-coupling faults in RAMs B. F. Cockburn Memory Test Pages: 91 - 113
A test generation program for sequential circuits Enrico MaciiAngelo R. Meo Jetta Letter Pages: 115 - 119
