1. Editorial

   • Vishwani D. Agrawal

   EditorialNotes 12 December 2019 Pages: 761 - 763

   

2. The Newsletter of the Test Technology Technical Council of the IEEE Computer Society Editor: Theo Theocharides

   News 17 December 2019 Pages: 765 - 766

   

3. DVFS Based Error Avoidance Strategy in Wireless Network-on-Chip

   • Yiming Ouyang
   • Qi Wang
   • Huaguo Liang

   OriginalPaper 27 November 2019 Pages: 767 - 777

   

4. Fault Localization and Testability Approaches for FPGA Fabric Aware Canonic Signed Digit Recoding Implementations

   • Ayan Palchaudhuri
   • Anindya Sundar Dhar

   OriginalPaper 13 November 2019 Pages: 779 - 796

   

5. Multi-Step-Ahead Prediction for a CMOS Low Noise Amplifier Aging Due to NBTI and HCI Using Neural Networks

   • Chuang Yang
   • Feng Feng

   OriginalPaper 11 December 2019 Pages: 797 - 808

   

6. Efficient Built-In Test and Calibration of High Speed Serial I/O Systems Using Monobit Signal Acquisition

   • Thomas Moon
   • Hyun Woo Choi
   • Abhijit Chatterjee

   OriginalPaper 20 January 2020 Pages: 809 - 822

   

7. Multi-PVT-Point Analysis and Comparison of Recent Small-Delay Defect Quality Metrics

   • Omar Al-Terkawi Hasib
   • Yvon Savaria
   • Claude Thibeault

   OriginalPaper 26 December 2019 Pages: 823 - 838

   

8. An Efficient Technique to Detect Stealthy Hardware Trojans Independent of the Trigger Size

   • S. M. Sebt
   • A. Patooghy
   • H. Beitollahi

   OriginalPaper 18 December 2019 Pages: 839 - 852

   

9. Leveraging Balanced Logic Gates as Strong PUFs for Securing IoT Against Malicious Attacks

   • Weize Yu
   • Yiming Wen

   OriginalPaper 04 December 2019 Pages: 853 - 865

   

10. Comparing Graph-Based Algorithms to Generate Test Cases from Finite State Machines

    • Matheus Monteiro Mariano
    • Érica Ferreira de Souza
    • Nandamudi Lankalapalli Vijaykumar

    OriginalPaper 11 January 2020 Pages: 867 - 885

    

11. Repurposing FPGAs for Tester Design to Enhance Field-Testing in a 3D Stack

    • Yi Sun
    • Fanchen Zhang
    • R. Iris Bahar

    OriginalPaper 30 December 2019 Pages: 887 - 900

    

12. Design of Approximate Subtractors and Dividers for Error Tolerant Image Processing Applications

    • Anusha Gorantla
    • P. Deepa

    OriginalPaper 26 October 2019 Pages: 901 - 907

    

13. A Single Event Upset Resilient Latch Design with Single Node Upset Immunity

    • Xixi Dai
    • Haibin Wang
    • Kang Yan

    OriginalPaper 02 October 2019 Pages: 909 - 916

    

14. Noise and Spur Comparison of Delta-Sigma Modulators in Fractional-N PLLs

    • Bo Zhou
    • Yao Li
    • Fuyuan Zhao

    OriginalPaper 26 December 2019 Pages: 917 - 923