1. Editorial

   • Vishwani D. Agrawal

   EditorialNotes 08 April 2015 Pages: 123 - 123

2. Test Technology Newsletter

   News 08 April 2015 Pages: 125 - 126

   

3. Digital Calibration for 8-bit Delay Line ADC Using Harmonic Distortion Correction

   • Hsun-Cheng Lee
   • Jacob A. Abraham

   OriginalPaper 19 April 2015 Pages: 127 - 138

   

4. Application-Based Analysis of Register File Criticality for Reliability Assessment in Embedded Microprocessors

   • Felipe Restrepo-Calle
   • Sergio Cuenca-Asensi
   • Fernanda Lima Kastensmidt

   OriginalPaper 20 February 2015 Pages: 139 - 150

   

5. Scalable and Optimized Hybrid Verification of Embedded Software

   • Jörg Behrend
   • Djones Lettnin
   • Wolfgang Rosenstiel

   OriginalPaper 27 March 2015 Pages: 151 - 166

   

6. Reusing RTL Assertion Checkers for Verification of SystemC TLM Models

   • Nicola Bombieri
   • Franco Fummi
   • Mirella Negro Marcigaglia

   OriginalPaper 20 March 2015 Pages: 167 - 180

   

7. A Determinate Radiation Hardened Technique for Safety-Critical CMOS Designs

   • Ryan H.-M. Huang
   • Dennis K.-H. Hsu
   • Charles H.-P. Wen

   OriginalPaper 27 March 2015 Pages: 181 - 192

   

8. Formal Quantification of the Register Vulnerabilities to Soft Error in RTL Control Paths

   • Liang Chen
   • Mojtaba Ebrahimi
   • Mehdi B. Tahoori

   OriginalPaper 11 April 2015 Pages: 193 - 206

   

9. A Shift-Register Based BIST Architecture for FPGA Global Interconnect Testing and Diagnosis

   • Igor Gadelha Pereira
   • Leonardo Alves Dias
   • Cleonilson Protásio de Souza

   OriginalPaper 13 March 2015 Pages: 207 - 215

   

10. Analog Circuits Soft Fault Diagnosis Using Rényi’s Entropy

    • Xuan Xie
    • Xifeng Li
    • Yongle Xie

    OriginalPaper 29 March 2015 Pages: 217 - 224