1. Test Technology TC Newsletter

   Letter Pages: 1 - 2

2. Editorial

   • Vishwani D. Agrawal

   Editorial Introduction Pages: 79 - 79

3. Guest Editorial

   • Marcelo Lubaszewski
   • Victor Champac

   Editorial Introduction Pages: 83 - 84

4. Detectability Conditions of Full Opens in the Interconnections

   • Antonio Zenteno
   • Victor H. Champac
   • Joan Figueras

   OriginalPaper Pages: 85 - 95

5. An Effective Deterministic BIST Scheme for Shifter/Accumulator Pairs in Datapaths

   • Nektarios Kranitis
   • Antonis Paschalis
   • Yervant Zorian

   OriginalPaper Pages: 97 - 107

6. Cost/Quality Trade-off in Synthesis for BIST

   • P. Bukovjan
   • L. Ducerf-Bourbon
   • M. Marzouki

   OriginalPaper Pages: 109 - 119

7. Fault Models and Test Generation for OpAmp Circuits—The FFM

   • José Vicente Calvano
   • Antônio Carneiro de Mesquita Filho
   • Marcelo Soares Lubaszewski

   OriginalPaper Pages: 121 - 138

8. A Low-Cost BIST Architecture for Linear Histogram Testing of ADCs

   • F. Azaïs
   • S. Bernard
   • M. Renovell

   OriginalPaper Pages: 139 - 147

9. Synthesis of an 8051-Like Micro-Controller Tolerant to Transient Faults

   • Érika Cota
   • Fernanda Lima
   • Ricardo Reis

   OriginalPaper Pages: 149 - 161

10. Improving Reconfigurable Systems Reliability by Combining Periodical Test and Redundancy Techniques: A Case Study

    • Eduardo Augusto Bezerra
    • Fabian Vargas
    • Michael Paul Gough

    OriginalPaper Pages: 163 - 174

11. Constraint Based Criteria: An Approach for Test Case Selection in the Structural Testing

    • Silvia Regina Vergilio
    • José Carlos Maldonado
    • Mario Jino

    OriginalPaper Pages: 175 - 183

12. An Isochronous Testing Strategy for Hierarchical Adaptive Distributed System-Level Diagnosis

    • Alessandro Brawerman
    • Elias Procópio Duarte Jr.

    OriginalPaper Pages: 185 - 195

13. Call for Papers

    Call for Papers Pages: 197 - 197