1. Editorial

   • Vishwani D. Agrawal

   EditorialNotes 22 November 2006 Pages: 307 - 307

2. Test Technology Newsletter

   News 22 November 2006 Pages: 309 - 310

3. Guest Editorial

   • Salvador Mir
   • Tim Cheng
   • Andrew Richardson

   EditorialNotes 19 January 2007 Pages: 311 - 311

4. Test Development Through Defect and Test Escape Level Estimation for Data Converters

   • Carsten Wegener
   • Michael Peter Kennedy

   OriginalPaper 23 November 2006 Pages: 313 - 324

5. A BIST Scheme for SNDR Testing of ΣΔ ADCs Using Sine-Wave Fitting

   • Luis Rolíndez
   • Salvador Mir
   • Jean-Louis Carbonéro

   OriginalPaper 18 January 2007 Pages: 325 - 335

6. Next Generation ADC Massive Parallel Testing with Real Time Parameter Evaluation

   • Heinz Mattes
   • Stéphane Kirmser
   • Sebastian Sattler

   OriginalPaper 30 November 2006 Pages: 337 - 350

7. A First Step for an INL Spectral-Based BIST: The Memory Optimization

   • V. Kerzérho
   • S. Bernard
   • J. M. Janik

   OriginalPaper 08 December 2006 Pages: 351 - 357

8. Investigation into the Use of Hybrid Solutions for ΣΔ A/D Converter Testing

   • K. Georgopoulos
   • A. Lechner
   • A. Richardson

   OriginalPaper 18 January 2007 Pages: 359 - 370

9. Towards Fault-Tolerant RF Front Ends

   • Tejasvi Das
   • Anand Gopalan
   • P. R. Mukund

   OriginalPaper 18 January 2007 Pages: 371 - 386

10. On-Chip Random Jitter Testing Using Low Tap-Count Coarse Delay Lines

    • Jiun-Lang Huang

    OriginalPaper 22 November 2006 Pages: 387 - 398

11. Structural Fault Modeling and Fault Detection Through Neyman–Pearson Decision Criteria for Analog Integrated Circuits

    • Amir Zjajo
    • Jose Pineda de Gyvez
    • Guido Gronthoud

    OriginalPaper 22 November 2006 Pages: 399 - 409

12. Proposal of Fault Diagnosis of Analog Circuits by Combining Operation-Region Model and X–Y Zoning Method: Case Study

    • Yukiya Miura

    OriginalPaper 07 December 2006 Pages: 411 - 423

13. TBSA: Threshold-Based Simulation Accuracy Method for Fast Analog DC Fault Simulation

    • Michel Morneau
    • Abdelhakim Khouas

    OriginalPaper 22 November 2006 Pages: 425 - 436

14. A 1-MHz Area-Efficient On-Chip Spectrum Analyzer for Analog Testing

    • M. A. Domínguez
    • J. L. Ausín
    • G. Torelli

    OriginalPaper 30 November 2006 Pages: 437 - 448

15. Built-In-Self-Testing Techniques for Programmable Capacitor Arrays

    • Amit Laknaur
    • Sai Raghuram Durbha
    • Haibo Wang

    OriginalPaper 23 November 2006 Pages: 449 - 462

16. Embedded System Level Self-Test for Mixed-Signal IO Verification

    • V. Loukusa

    OriginalPaper 01 December 2006 Pages: 463 - 470

17. Lifetime Prediction and Design-for-Reliability of IC Interconnections with Electromigration Induced Degradation in the Presence of Manufacturing Defects

    • Xiangdong Xuan
    • Adit D. Singh
    • Abhijit Chatterjee

    OriginalPaper 22 November 2006 Pages: 471 - 482