Influence of Annealing on Crystallinity and Conductivity of p-type Nanocrystalline Si films

Abstract

Nanocrystalline p-type Si:H layers are important for photovoltaic and MOSFET devices. A high conductivity in these layers leads to better voltages in PV devices and to lower series resistance in both PV and MOSFET devices. The lower resistance results in higher channel mobility in MOSFET devices and higher fill factors in PV devices. In this work, we discuss the improvement in conductivity and crystallinity of p-type nanocrystalline Si:H layers by the use of post-deposition annealing. The p layers were deposited at ~ 180°C from mixtures of silane, hydrogen, helium and diborane using ECR plasma deposition techniques. It was found that addition of He to H at first improved both the conductivity and crystallinity, but too much He led to an amorphous phase and lower conductivity. The as-grown films were measured for their crystallinity using both Raman spectroscopy and x-ray diffraction. The conductivity and activation energies were also measured. The films were then successively annealed at temperatures of 250, 300, 350 and 400°C. The crystallinity and grain size were found to increase as the annealing temperature increased. The greatest relative increase was during the initial annealing stages. The conductivity of the films increased significantly as a consequence of the annealing. Conductivities as large as 20 S/cm were obtained in very thin films (~50–150 nm). The corresponding activation energies were in the range of 0.03 eV. When these annealed layers were used for MOSFET and PV devices, there was an appreciable increase in performance characteristics.