Skip to main content

Part of the book series: International Series on Microprocessor-Based Systems Engineering ((ISCA,volume 3))

  • 221 Accesses

Abstract

One of the primary tasks of microprocessors is to collect and manipulate data. In setting the optimum in a μP-based systems, the designer must consider that critically related signals are found at the ends of relatively long logic chains,whose delays can vary from unit to unit. In other words, data collection and manipulation often require that the data be documented in terms of actual time of collection or a period of time needed to collect the data.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 169.00
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 219.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD 219.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

Cited References

  1. R. Davis, “Real-Time Clock System Design Considerations,” Wescon/81, pp.31/2.1–31/2.7, San Francisco, CA, September 15–17, 1981.

    Google Scholar 

  2. Exar Integrated Systems, Inc., Timer Data Book, Sunnyvale, CA, June 1981.

    Google Scholar 

  3. R.P. Rony, “Interfacing Fundamentals: Timing Diagram Conventions,” Computer Design, pp. 152–153, January 1980.

    Google Scholar 

  4. A. Rappaport, “Hands-on Timing Verification Validates IC-Design Techniques,” EDN, p.147, November 24, 1983.

    Google Scholar 

  5. A.W. Bentley, “Single-Chip Controller Increases Microprocessor Throughput,” Computer Design, p. 125, September 1980.

    Google Scholar 

  6. E. Dummermuth, “Design Tips for Reliable Logic,” Machine Design, pp. 93–96, January 10, 1980.

    Google Scholar 

  7. P.R. Rony, et al.,“Interfacing Fundamentals:Real-Time Clock Hardware and Software,” Computer Design, p.126, January 1979.

    Google Scholar 

  8. B. Huston, “Watch Chip for an MPU-Real-Time Clock Peripheral,” EZectro/81, pp.15/2.1–15/2.8, New York, April 7–9, 1981.

    Google Scholar 

  9. H.D. Bryce, “Versatile Programmable Module Meets μP Timing Needs,” EDN, p.145, October 5, 1980.

    Google Scholar 

  10. D. Wicker, “Programmable Interval Timer,” Digital Design, p. 32, May 1980.

    Google Scholar 

  11. H.W. Look, et al., “Clock Chip Mates Fast μPs With Slower Devices,” Electronic Design, p.125, November 24, 1983.

    Google Scholar 

General References

  • D. Trimble, “Dual Flip-Flops Single-Step a Z80,” EDN, p.207, May 12, 1982.

    Google Scholar 

  • P.R. Rony, “Interfacing Fundamentals: Bused Flags,” Computer Design, p. 162, July 1981.

    Google Scholar 

  • F. Chitayat, “Timing Circuit Generates Selectable Clock Frequencies,” Computer Design, pp. 104–107, December 1979.

    Google Scholar 

  • C.L. Jiang and M. Bolan, “FIFO-The Glue Holding Systems Together,” Computer Design,p, 181, June 1983.

    Google Scholar 

  • L. Levin and W. Meyers, “Timing: A Crucial Factor in LSI-MOS Main Memory Design,” Electronics, pp. 107–11, july 10, 1975.

    Google Scholar 

  • C.A. Wiatrowski and C.H. House, Logic Circuits and Microcomputer Systems. New York: McGraw-Hill, 1980.

    MATH  Google Scholar 

  • Y. Fukuda, “Recent Development of Crystal Clock Oscillators,” JEE, pp. 55–57, September 1983.

    Google Scholar 

  • D. Derkach and W. Cohen, “Serial CMOS Real-Time Clock Adds Fearures While Reducing System Costs,” Mini/Micro Northeast, Boston, MA, May 15–17, 1984.

    Google Scholar 

  • D. Tarkett, Test Step Synchronization,“Electronics Test, p. 22, July 1981.

    Google Scholar 

  • B. Sandberg, “State Diagrams for a 555 Timer Aid Development of New Applications,” Electronic Design 17, p.100, August 16, 1976.

    Google Scholar 

  • P.Loose, “Modern Electronic-Based Timing Systems,” Electronic Engineering, p. 81, May 1979.

    Google Scholar 

  • E. Petrin, “N-Channel Asynchronous Arbiter Resolves Resource Allocation Conflicts,” Computer Design, p. 126, August 1980.

    Google Scholar 

  • Bruce Ableidinger, et al., “Timing Board Complement State Analyzer in PC Add-on,” Electronic Design, p.137, November 24, 1983.

    Google Scholar 

  • H. Garland, Introduction to Microprocessor System Design. New York: McGraw-Hill, 1979.

    Google Scholar 

  • R.P. Jain, Digital Electronics. New York: McGraw-Hill, 1984.

    Google Scholar 

  • N. Edmundson, “ECL In High-Performance Systems,” Southcon/85 and Mini/ Micro Southeast, Georgia World Congress Center, March 5–7, 1985.

    Google Scholar 

  • E. Sun, “VLSI Building Blocks for High-Performance Digital Systems,” Electro/85, New York, April 23–25, 1985.

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Rights and permissions

Reprints and permissions

Copyright information

© 1985 D. Reidel Publishing Company, Dordrecht, Holland

About this chapter

Cite this chapter

Georgopoulos, C.J. (1985). μP Timing and Synchronization Interfaces. In: Interface Fundamentals in Microprocessor-Controlled Systems. International Series on Microprocessor-Based Systems Engineering, vol 3. Springer, Dordrecht. https://doi.org/10.1007/978-94-009-5470-0_4

Download citation

  • DOI: https://doi.org/10.1007/978-94-009-5470-0_4

  • Publisher Name: Springer, Dordrecht

  • Print ISBN: 978-94-010-8915-9

  • Online ISBN: 978-94-009-5470-0

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics