Abstract
Pipelined ADC design and key tradeoffs are discussed. Large DC gain and large capacitors are shown to be necessary to achieve high linearity in a pipelined ADC. ADC SNR is shown to be related to capacitor area, where to achieve a high SNR large capacitors are required. Front-end sample and holds are shown as key blocks to avoid sampling skew between the MDAC and sub-ADC in the first pipeline stage.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
Johns, D., Martin, K.: Analog Integrated Circuit Design. Wiley, New York (1997)
Lewis, S.H., Fetterman, H.S., Gross, G.F., Jr., Ramachandran, R., Viswanathan, T.R.: A 10-bit 20-Msample/s analog-to-digital converter. IEEE J. Solid-St. Circ. 27(3), 351–358 (1992)
Kwok, P.T.F. et al.: Power optimization for pipeline analog-to-digital converters. IEEE Trans. Circ. Syst-II: Analog Digi. Sig. Process. 36, 549–553 (1999)
Cline, D.: Noise, speed, and power trade-offs in pipelined analog to digital converters. Ph.D. in Engineering thesis, University of California Berkeley (1995)
Chien, G.: High-speed, lower-power, low-voltage pipelined analog-to-digital converter. Masters of Science thesis, University of California Berkeley (1996)
Bult, K., Geelen, G.J.G.M.: A fast settling CMOS Op Amp for SC circuits with 90-dB DB gain. IEEE J. Solid-St. Circ. 25, 1379–1384 (1990)
You, F., Embabi, S.H.K., Sanchez-Sinencio, E.: Multistage amplifier topologies with nested Gm-C compensation. IEEE J. Solid-St. Circ. 32(12), 2000–2011 (1997)
Razavi, B.: Design of Analog CMOS Integrated Circuits. McGraw-Hill, New York (2000)
Sumanen, L. et al.: CMOS dynamic comparators for pipeline A/D converters. 2002 IEEE International Symposium on Circuits and Systems (ISCAS), vol. 5, pp. 157–160, May 2002
Yang, W., Kelly, D., Mehr, L., Sayuk, M.T., Singer, L.: A 3-V 340-mW 14-b 75-Msample/s CMOS ADC with 85-dB SFDR at Nyquist input. IEEE J. Solid-St. Circ. 36(12), 1931–1936 (2001)
Author information
Authors and Affiliations
Corresponding author
Rights and permissions
Copyright information
© 2010 Springer Science+Business Media B.V.
About this chapter
Cite this chapter
Ahmed, I. (2010). Pipelined ADC Architecture Overview. In: Pipelined ADC Design and Enhancement Techniques. Analog Circuits and Signal Processing. Springer, Dordrecht. https://doi.org/10.1007/978-90-481-8652-5_3
Download citation
DOI: https://doi.org/10.1007/978-90-481-8652-5_3
Published:
Publisher Name: Springer, Dordrecht
Print ISBN: 978-90-481-8651-8
Online ISBN: 978-90-481-8652-5
eBook Packages: EngineeringEngineering (R0)