Abstract
In high performance and low power multimedia embedded system design, VLIW-based embedded DSPs compilers that exploit ILP have become popular and play an important role today. For this reason, we need optimizing embedded DSP compilers that can both generate capable and efficient code in terms of performance, power, size, and productivity. In this paper, we show a post-compilation framework that can further optimize programs that have already been compiled and optimized by another compiler, by using runtime information and exploiting hardware specific features of DSPs. Finally, we show in our simulation results, that even programs compiled at the best optimization level, can obtain significant improvement through the use of this framework.
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Cheng, MH., Slagter, K., Lung, TW., Chung, YC. (2010). A VLIW-Based Post Compilation Framework for Multimedia Embedded DSPs with Hardware Specific Optimizations. In: Hsu, CH., Malyshkin, V. (eds) Methods and Tools of Parallel Programming Multicomputers. MTPP 2010. Lecture Notes in Computer Science, vol 6083. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-14822-4_6
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DOI: https://doi.org/10.1007/978-3-642-14822-4_6
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