Abstract
Tradeoffs among inductance, area, and resistance of power distribution grids are evaluated in this chapter. As discussed in Sect. 1.3, design objectives, such as low impedance (low inductance and resistance), small area, and low current densities (for improved reliability ), are typically in conflict. It is therefore important to make a balanced compromise among these design goals based upon application-specific constraints. A quantitative model of the inductance/area/resistance tradeoff in high performance power distribution networks is therefore necessary to achieve an efficient power distribution network. Another important goal is to provide quantitative guidelines to these tradeoffs and to bring intuition to the design of high performance power distribution networks.
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References
A.V. Mezhiba E.G. Friedman, Inductive characteristics of power distribution grids in high speed integrated circuits, in Proceedings of the IEEE International Symposium on Quality Electronic Design, pp. 316–321, Mar 2002
A.V. Mezhiba, E.G. Friedman, Inductance/area/resistance tradeoffs in high performance power distribution grids, in Proceedings of the IEEE International Symposium on Circuit and Systems, vol. I, pp. 101–104, May 2002
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P.-Vaisband, I., Jakushokas, R., Popovich, M., Mezhiba, A.V., Köse, S., Friedman, E.G. (2016). Inductance/Area/Resistance Tradeoffs. In: On-Chip Power Delivery and Management. Springer, Cham. https://doi.org/10.1007/978-3-319-29395-0_30
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DOI: https://doi.org/10.1007/978-3-319-29395-0_30
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