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Hierarchical wiring in multigrids

  • Load Balancing And The Mapping Problem
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CONPAR 90 — VAPP IV (VAPP 1990, CONPAR 1990)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 457))

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References

  1. P. M. Behr, W. K. Giloi, H. Mühlenbein, SUPRENUM: The German Supercomputer Project — Rationale and Concepts, IEEE Int. Conf. on Parallel Processing, 1986.

    Google Scholar 

  2. F. Berman, Experience with an Automatic Solution to the Mapping Problem, in: L. Jamieson, D. Gannon, R. Douglass, The Characteristics of Parallel Algorithms, MIT Press.

    Google Scholar 

  3. F. Berman, L. Snyder, On Mapping Parallel Algorithms into Parallel Architectures, J. Parallel Distr. Comp. 4 (1987), 439–458.

    Article  Google Scholar 

  4. J. E. Boillat, P. G. Kropf, D. Chr. Meier, A. Wespi, An Analysis and Reconfiguration Tool for Mapping Parallel Programs onto Transputer Networks, Proc. 7th Occam User Group Meeting, Grenoble, September, 1987.

    Google Scholar 

  5. S. H. Bokhari, On the Mapping Problem, IEEE Trans. Comput., C-30 (3), 1981, 207–214.

    Google Scholar 

  6. M. Burstein, Hierarchical Channel Router, INTEGRATION 1 (1983), 21–38.

    Google Scholar 

  7. P. Eklund, Mapping Processes onto Processors, Wissenschaftliche Zeitschrift, TH Leipzig, 12 (1988), 105–109.

    Google Scholar 

  8. P. Eklund, A Categorical Framework for Modularizations of the Mapping Problem, manuscript, 1989.

    Google Scholar 

  9. P. Eklund, T.-E. Malén, Block Placement in Switching Networks, Proc. CONPAR88, Manchester, Sept 12–16, 1988, Cambridge University Press.

    Google Scholar 

  10. P. Eklund, Mapping in Variable Architectures, manuscript, 1989.

    Google Scholar 

  11. J. Eudes, T. Muntean, C. Tricot, Operating (Reconfigurable) Networks of Transputers, Proc. 7th Occam User Group Meeting, Grenoble, September, 1987.

    Google Scholar 

  12. A. Frank, Disjoint Paths in a Rectilinear Grid, Combinatorica 2, 4 (1982), 361–371.

    Google Scholar 

  13. G. Hill, Design and Applications for the IMS C004, INMOS Technical note 19, INMOS Limited, June 1987, Bristol.

    Google Scholar 

  14. C. R. Jesshope, ESPRIT 1085 — Somebody Else's Problem, Proc. CONPAR88, Manchester, Sept 12–16, 1988.

    Google Scholar 

  15. M. R. Kramer, J. van Leeuwen, The Complexity of Wire-Routing and Finding Minimum Area Layouts for Arbitrary VLSI Circuits, Advances in Computing Research, 2 (1984), 129–146.

    Google Scholar 

  16. O. Krämer, H. Mühlenbein, Mapping Strategies in Message Based Multiprocessor Systems, Proc. PARLE (6/87), LNCS 258, Springer, 1988.

    Google Scholar 

  17. C. Y. Lee, An Algorithm for Path Connections and Its Applications, IRE Trans. on Electronic Computers, September (1961), 346–365.

    Google Scholar 

  18. W. K. Luk, P. Sipala, M. Tamminen, D. Tang, L. S. Woo, C. K. Wong, A Hierarchical Global Wiring Algorithm for Custom Chip Design, IEEE CAD 6 (1987), 518–533.

    Google Scholar 

  19. K. Mehlhorn, F. P. Preparata, Routing through a Rectangle, JACM 33 (1986), 60–85.

    Article  Google Scholar 

  20. H. Mühlenbein, M. Gorges-Schleuter, O. Krämer, New Solutions to the Mapping Problem of Parallel Systems: The Evolution Approach, Parallel Computing, 4 (1987), 269–279.

    Article  Google Scholar 

  21. D. A. Nicole, E. K. Lloyd, J. S. Ward, Switching Networks for Transputer Links, Proc. 8th Technical meeting of the Occam User Group, March 1988, 147–165.

    Google Scholar 

  22. H. Okamura, P. Seymour, Multicommodity Flows in Planar Graphs, J. Combinatorial Theory, Ser. B 31 (1981), 75–81.

    Google Scholar 

  23. E. Shapiro, Systolic Programming: A Paradigm of Parallel Processing, Technical Report CS84-16 (The Weizmann Institute of Science), in: Proc. FGCS, 1984.

    Google Scholar 

  24. L. Snyder, Introduction to the Configurable, Highly Parallel Computer, IEEE Computer, January 1982, 47–56.

    Google Scholar 

  25. B. Stramm, F. Berman, Communication-Sensitive Heuristics and Algorithms for Mapping Compilers, preprint, 1988.

    Google Scholar 

  26. L. G. Valiant, Universality Considerations in VLSI circuits, IEEE Trans. Comput. 30 (1981), 135–140.

    Google Scholar 

  27. S. Yalamanchili, J. K. Aggarwal, Reconfiguration Strategies for Parallel Architectures, Computer, Dec. 1985, 44–61.

    Google Scholar 

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Author information

Authors and Affiliations

  1. Department of Computer Science, Abo Akademi University, SF-20520, Abo, Finland

    Patrik Eklund

  2. Fachbereich 10 Informatik, Universität des Saarlandes, D-6600, Saarbrücken, West Germany

    Michael Kaufmann

Authors
  1. Patrik Eklund
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  2. Michael Kaufmann
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Editor information

Helmar Burkhart

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© 1990 Springer-Verlag Berlin Heidelberg

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Eklund, P., Kaufmann, M. (1990). Hierarchical wiring in multigrids. In: Burkhart, H. (eds) CONPAR 90 — VAPP IV. VAPP CONPAR 1990 1990. Lecture Notes in Computer Science, vol 457. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-53065-7_121

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  • DOI: https://doi.org/10.1007/3-540-53065-7_121

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-53065-7

  • Online ISBN: 978-3-540-46597-3

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