Skip to main content
SpringerLink
Log in

Watermarking Techniques for Electronic Circuit Design

  • Conference paper
  • First Online:
Digital Watermarking (IWDW 2002)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 2613))

Included in the following conference series:

Abstract

Enforcing copyright laws related to circuit design is usually hard, since discovery and proof of infringements are required beyond reasonable doubt. Proving that a given circuitry is trivially derived from a patented technique or method is in general a painstakingly slow task, often requiring reverse-engineering and forensic analysis of fabricated chips. These techniques are so complex that their application to large collections of commercial products is almost always prohibitive. Watermarking is one of several techniques available today to deter copyright infringement in electronic systems. The technique consists of implanting indelible stamps in the circuit’s inner structure, while not disrupting its functionality or significantly degrading its performance. In this paper a series of methods is proposed for the creation of watermarks at several stages of the design cycle, from high-level design to layout. Algorithms are described for implanting robust watermarks to minimize the overhead and, ultimately, to reduce the impact on performance. Detection methods are discussed in the presence of infringement. The resilience of the methods in several tampering regimes is estimated.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Log in via an institution
Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 39.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 54.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. I. J. Cox, M. L. Miller, J. A. Bloom. Digital Watermarking. Morgan Kaufmann, 2001.

    Google Scholar 

  2. M. D. Swanson, B. Zhu, and A. H. Tewfik. Transparent robust image watermarking. In Proc. IEEE International Conference on Image Processing, volume 3, pages 211–214, September 1996.

    Google Scholar 

  3. L. Boney, A. H. Tewfik, and K. N. Hamdy. Digital watermarks for audio signals. In Proc. IEEE International Conference on Multimedia Computing and Systems, pages 473–480, June 1996.

    Google Scholar 

  4. J. Lach, W. H. Mangione-Smith, and M. Potkonjak. Fpga fingerprinting techniques for protecting intellectual property. In Proc. IEEE Custom Integrated Circuit Conference, pages 299–302, May 1998.

    Google Scholar 

  5. J. Lach, W. H. Mangione-Smith, and M. Potkonjak. Robust fpga intellectual property protection through multiple small watermarks. In Proc. IEEE/ACM Design Automation Conference, pages 831–836, June 1999.

    Google Scholar 

  6. J. Lach, W. H. Mangione-Smith, and M. Potkonjak. Signature hiding techniques for fpga intellectual property protection. In Proc. IEEE International Conference on Computer Aided Design, pages 194–198, November 1998.

    Google Scholar 

  7. E. Charbon. Hierarchical watermarking in IC design. In Proc. IEEE Custom Integrated Circuit Conference, pages 295–298, May 1998.

    Google Scholar 

  8. E. Charbon and I. Torunoglu. Watermarking layout topologies. In Proc. IEEE Asia South-Pacific Design Automation Conference, pages 213–216, January 1999.

    Google Scholar 

  9. A. Kahng, J. Lach, W. H. Mangione-Smith, S. Mantik, I. L. Markov, M. Potkonjak, P. Tucker, H. Wang, and G. Wolfe. Watermarking techniques for intellectual property protection. In Proc. IEEE/ACM Design Automation Conference, pages 776–781, June 1998.

    Google Scholar 

  10. D. Kirovski, Y. Y. Hwang, M. Potkonjak, and J. Cong. Intellectual property protection by watermarking combinational logic synthesis solutions. In Proc. IEEE International Conference on Computer Aided Design, pages 194–198, November 1998.

    Google Scholar 

  11. I. Torunoglu and E. Charbon. Watermarking-based copyright protection of sequential functions. InProc. IEEE Custom Integrated Circuit Conference, pages 35–38, May 1999.

    Google Scholar 

  12. A. L. Oliveira. Robust techniques for watermarking sequential circuit designs. In Proc. IEEE/ACM Design Automation Conference, pages 837–842, June 1999.

    Google Scholar 

  13. E. Charbon and I. Torunoglu. Copyright protection of designs based on multi source IPs. In Proc. IEEE International Conference on Computer Aided Design, pages 591–595, November 1999.

    Google Scholar 

  14. I. Torunoglu and E. Charbon. Watermarking-based copyright protection of sequential functions. IEEE Journal of Solid State Circuits, SC-35(3), pages 434–440, 2000.

    Article  Google Scholar 

  15. T. Villa, T. Kam, R. Brayton, and A. Sangiovanni-Vincentelli. Synthesis of Finite State Machines: Logic Optimization. Kluwer Academic Publ., Boston, MA, 1997.

    MATH  Google Scholar 

  16. J. M. Pena and A. L. Oliveira. A new algorithm for the reduction of incompletely specified finite state machines. In Proc. IEEE International Conference on Computer Aided Design, pages 482–489, November 1998.

    Google Scholar 

  17. G. De Micheli. Synthesis and Optimization of Digital Circuits. McGraw-Hill, 1994.

    Google Scholar 

  18. C. F. Pfleeger. State reduction in completely specified finite state machines. IEEE Trans. on Computers, C-22, pages 1099–1102, 1973.

    Google Scholar 

  19. T. Whitney. Hierarchical Composition of VLSI Circuits. PhD thesis, California Institute of Technology, 1985.

    Google Scholar 

  20. J. Valainis, S. Kaptanoglu, E. Liu, and R. Suaya. Two-dimensional ic layout compaction based on topological design rule checking. IEEE Trans. on Computer Aided Design, CAD-9(3), pages 260–275, March 1990.

    Article  Google Scholar 

  21. F. P. Preparata and M. I. Shamos. Computational Geometry. An Introduction. Springer, second edition, 1988.

    Google Scholar 

  22. R. H. J. M. Otten. Automatic floorplan design. In Proc. IEEE/ACM Design Automation Conference, pages 261–267, June 1982.

    Google Scholar 

  23. E. M. Sentovich, K. J. Singh, C. Moon, H. Savoj, R. K. Brayton, and A. L. Sangiovanni-Vincentelli. Sequential circuit design using synthesis and optimization. In Proc. IEEE International Conference on Computer Design, pages 328–333, October 1992.

    Google Scholar 

  24. E. M. Sentovich, K. J. Singh, L. Lavagno, C. Moon, R. Murgai, A. Saldanha, H. Savoj, P. R. Stephan, R. K. Brayton, and A. L. Sangiovanni-Vincentelli. Sis: A system for sequential circuit synthesis. Memorandum UCB/ERL M92/41, UCB, Univ. of California, Berkeley, CA 94720, May 1992.

    Google Scholar 

  25. C. Sechen and A. L. Sangiovanni-Vincentelli. Timberwolf3.2: A new standard cell placement and global routing package. In Proc. IEEE/ACM Design Automation Conference, pages 432–439, 1986.

    Google Scholar 

Download references

Author information

Authors and Affiliations

  1. Swiss Federal Institute of Technology, Lausanne, Switzerland

    Edoardo Charbon

  2. Canesta Inc., San Jose, California, USA

    Ilhami Torunoglu

Authors
  1. Edoardo Charbon
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Ilhami Torunoglu
    View author publications

    You can also search for this author in PubMed Google Scholar

Editor information

Editors and Affiliations

  1. Microsoft Research, 7 J. J. Thomson Avenue, CB3 0FB, Cambridge, UK

    Hyoung Joong Kim

  2. Department of Control and Instrumentation Engineering, Kangwon National University, 200-701, Chunchon, Korea

    Hyoung Joong Kim

Rights and permissions

Reprints and permissions

Copyright information

© 2003 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Charbon, E., Torunoglu, I. (2003). Watermarking Techniques for Electronic Circuit Design. In: Kim, H.J. (eds) Digital Watermarking. IWDW 2002. Lecture Notes in Computer Science, vol 2613. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-36617-2_13

Download citation

  • DOI: https://doi.org/10.1007/3-540-36617-2_13

  • Published:

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-01217-7

  • Online ISBN: 978-3-540-36617-1

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics

Search

Navigation