Skip to main content
SpringerLink
Log in

Application of parallel sparse direct methods in semiconductor device and process simulation

  • IV Applications
  • Conference paper
  • First Online:
Book cover High Performance Computing (ISHPC 1999)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1615))

Included in the following conference series:

  • 114 Accesses

Abstract

We present PARDISO, a new scalable parallel sparse direct linear solver on shared memory multiprocessors. In this paper, we describe the parallel factorization algorithm which utilizes the supernode structure of the matrix to reduce the number of memory references with Level 3 BLAS. We also propose enhancements that significantly reduce the communication rate for pipelining parallelism. The result, is a greatly increased factorization performance. Furthermore, we have investigated popular shared memory multiprocessors and the most popular numerical algorithms commonly used for the solution of the classical drift-diffusion and the diffusion-reaction equations in semiconductor device and process simulation. The study includes a preconditioned iterative linear solver package and our parallel direct linear solver. Moreover, we have investigated the efficiency and the limits of our parallel approach. Results of several simulations of up to 300'000 unknowns for three-dimensional simulations are presented to illustrate our approach towards robust, parallel semiconductor device and process simulation.

The work of O. Schenk was supported by a grant from the Cray Research and Development Grant Program and the Swiss Commission of Technology and Innovation under contract number 3975.1.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Log in via an institution

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. Integrated Systems Engineering AG. DESSIS-ise Reference Manual. ISE Integrated Systems Engineering AG, 1998.

    Google Scholar 

  2. Integrated Systems Engineering AG. DIOS-ise Reference Manual. ISE Integrated Systems Engineering AG, 1998.

    Google Scholar 

  3. G. Heiser, C. Pommerell, J. Weis, and W. Fichtner. Three-dimensional numerical semiconductor device simulation: Algorithms, architectures, results. IEEE Transactions on Computer-Aided Design, 10(10):1218–1230, 1991.

    Article  Google Scholar 

  4. J.W.H. Liu. Modification of the Minimum-Degree algorithm by multiple elimination. ACM Transactions on Mathematical Software, 11(2):141–153, 1985.

    Article  MATH  Google Scholar 

  5. G. Karypis and V. Kumar: Analysis of multilevel graph algorithms. Technical Report MN 95-037, University of Minnesota, Department of Computer Science, Minneapolis, MN 55455, 1995.

    Google Scholar 

  6. C.C. Ashcraft, R.R. Grimes, J.G. Lewis, B.W. Peyton, and H.D. Simon. Progress in sparse matrix methods for large linear systems on vector supercomputers. The International Journal of Supercomputer Applications, 1(4):10–30, 1987.

    Article  Google Scholar 

  7. E. Rothberg and A. Gupta. An evaluation of left-looking, right-looking, and multifrontal approaches to sparse, Cholesky factorization on hierarchical-memory machines. International Journal of High Speed Computing, 5(4):537–593, 1993.

    Article  Google Scholar 

  8. E. Rothberg. Exploiting the memory hierarchy in sequential and parallel sparse Cholesky factorization. PhD thesis, Stanford University, 1992. STAN-CS-92-1459.

    Google Scholar 

  9. E.G. Ng and B.W. Peyton. A supernodal Cholesky factorization algorithm for shared-memory multiprocessors. SIAM Journal of Scientific Computing, 14(4):761–769, 1993.

    Article  MathSciNet  MATH  Google Scholar 

  10. Integrated Systems Engineering AG. SUPER-ise reference Manual. ISE Integrated Systems Engineering AG, 1998.

    Google Scholar 

  11. I.S. Duff, R.G. Grimes, and J.G. Lewis. Users' guide for the Harwell-Boeing sparse matrix collection (release 1). Technical Report RAL-92-086, Rutherford Appleton Laboratory, 1992.

    Google Scholar 

  12. A. Liegmann. Efficient Solution of Large Sparse Linear Systems. PhD thesis, ETH Zürich, 1995.

    Google Scholar 

  13. J.W.H. Liu. The role of elimination trees in sparse, factorization. SIAM Journal on Matrix Analysis & Applications, 11(1):134–172, January 1990.

    Article  MATH  Google Scholar 

  14. P. Matstoms. Parallel sparse QR factorization on shared memory architectures. Parallel Computing, 21:473–486, 1995.

    Article  MATH  Google Scholar 

  15. R. Menon L. Dagnum. Open MP: An Industry-Standard API for Shared-Memory Programming. IEEE Computational Science & Engineering, 1:46–55, 1998.

    Google Scholar 

  16. O. Schenk, K. Gärtner, and W. Fichtner. Efficient sparse LU factorization with left-right looking strategy on shared memory multiprocessors. Technical Report 98/40, Integrated Systems Laboratory, ETH Zurich, Swiss Fed. Inst. of Technology (ETH), Zurich, Switzerland, Submitted to BIT Numerical Mathematics, 1998.

    Google Scholar 

  17. Y. Saad. Iterative Methods for Sparse Linear Systems. PWS Publishing Company, 1996.

    Google Scholar 

  18. G.L.G. Sleijpen, H.A. van der Vorst, and D.R. Fokkema. BiCGSTAB(I) and other hybrid Bi-CG methods. Technical Report TR Nr. 831, Department of Mathematics, University Utrecht, 1993.

    Google Scholar 

  19. D.R. Fokkema. Subspace methods for linear, nonlinear, and eigen problems. PhD thesis, Utrecht University, 1996.

    Google Scholar 

Download references

Author information

Authors and Affiliations

  1. Integrated Systems Laboratory, Swiss Federal Institute of Technology Zurich, ETH Zurich, 8092, Zurich, Switzerland

    Olaf Schenk & Wolfgang Fichtner

  2. Weierstrass Institute for Applied Analysis and Stochastics, Mohrenstr. 39, 10117, Berlin, Germany

    Klaus Gärtner

Authors
  1. Olaf Schenk
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Klaus Gärtner
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Wolfgang Fichtner
    View author publications

    You can also search for this author in PubMed Google Scholar

Editor information

Constantine Polychronopoulos Kazuki Joe Akira Fukuda Shinji Tomita

Rights and permissions

Reprints and permissions

Copyright information

© 1999 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Schenk, O., Gärtner, K., Fichtner, W. (1999). Application of parallel sparse direct methods in semiconductor device and process simulation. In: Polychronopoulos, C., Fukuda, K.J.A., Tomita, S. (eds) High Performance Computing. ISHPC 1999. Lecture Notes in Computer Science, vol 1615. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0094923

Download citation

  • DOI: https://doi.org/10.1007/BFb0094923

  • Published:

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-65969-3

  • Online ISBN: 978-3-540-48821-7

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics

Search

Navigation