Skip to main content

Statechart-based HW/SW-codesign of a multi-FPGA-board and a microprocessor

  • Miscellaneous
  • Conference paper
  • First Online:
Field-Programmable Logic and Applications From FPGAs to Computing Paradigm (FPL 1998)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1482))

Included in the following conference series:

  • 296 Accesses

Abstract

The codesign of hardware and software is an up-to-date issue. For increasing network data rates high performance communication subsystems are needed. This paper discusses an approach of a semiautomated HW/SW-implementation using a microprocessor and an FPGA-based flexible hardware platform. Moreover, an increasing productivity in implementing such systems efficiently and correctly is needed. Therefore, the semi-automated approach is applied to an implementation of a modern communication protocol on the flexible platform.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 39.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 54.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. Abbott, M., Peterson, L.: Increasing Network Throughput by Integrated Protocol Layers. IEEE/ACM Transactions on networking, Vol. 1, No. 5 (1993)

    Google Scholar 

  2. Henke, R., König, H., Mitschele-Thiel, A.: Derivation of Efficient Implementations from SDL Specifications Employing Data Referencing. Integrated Packet Framing and Activity Threads. Eighth SDL Forum, North-Holland (1997)

    Google Scholar 

  3. Carle, G., Schiller, J.: High-Performance Implementation of Protocols using Cell-Based Error Control Mechanisms for ATM Networks (in German). GI Fachtagung Kommunikation in verteilten Systemen (KiVS), Braunschweig, Germany (1997)

    Google Scholar 

  4. Harel, D.: Statecharts: a Visual Formalism for Complex Systems. Science of Computer Programming, Vol. 8, August 1987

    Google Scholar 

  5. Buchenrieder, K., Pyttel, A., Veith, C.: Mapping Statechart Models onto an FPGA-Based ASIP Architecture. Euro-DAC96, Geneva, Swizzerland (1996)

    Google Scholar 

  6. Braun, T.: A parallel Transport Subsystem for cell-based high-speed Networks (in German). Dissertation, University of Karlsruhe (1993)

    Google Scholar 

  7. Statemate Magnum Reference Manual. i-Logix Inc., Andover, USA (1997)

    Google Scholar 

  8. Speedchart Reference Manual. Speed Electronic Inc., Swizzerland (1996)

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Reiner W. Hartenstein Andres Keevallik

Rights and permissions

Reprints and permissions

Copyright information

© 1998 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Ackad, C. (1998). Statechart-based HW/SW-codesign of a multi-FPGA-board and a microprocessor. In: Hartenstein, R.W., Keevallik, A. (eds) Field-Programmable Logic and Applications From FPGAs to Computing Paradigm. FPL 1998. Lecture Notes in Computer Science, vol 1482. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0055280

Download citation

  • DOI: https://doi.org/10.1007/BFb0055280

  • Published:

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-64948-9

  • Online ISBN: 978-3-540-68066-6

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics