Abstract
The configurable logic cells of the SRAM-based FPGA are mainly described as an interconnection of functional logic module. In this paper, we state that the stuck-at fault model can be used on such a description when multiplexer-based module are under consideration. To validate this assumption, the following step are realized. A test sequence is generated for the functional description assuming a stuck-at fault model of the input/output. The test sequence is applied, on a logic gate implementation assuming a stuck-at fault model of the gates nodes and then, on a transmission gate implementation assuming a short fault model. In the both case the fault coverage is 100%.
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Renovell, M., Portal, J.M., Figueras, J., Zorian, Y. (1998). SRAM-based FPGAs: A fault model for the configurable logic modules. In: Hartenstein, R.W., Keevallik, A. (eds) Field-Programmable Logic and Applications From FPGAs to Computing Paradigm. FPL 1998. Lecture Notes in Computer Science, vol 1482. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0055241
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DOI: https://doi.org/10.1007/BFb0055241
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