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Probabilistic analysis of algorithms for stuck-at test generation in PLAs

  • John Franco
Conference paper
Part of the Lecture Notes in Control and Information Sciences book series (LNCIS, volume 174)

Abstract

A collection of fast algorithms for generating test vectors for PLAs is presented and analysed. It is shown that, in some sense, complete sets of test vectors for almost all such circuits which are irredundant, primal, and non-tautological can be generated quickly.

Keywords

Boolean Variable Test Vector Truth Assignment Random Instance Unit Clause 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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References

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Copyright information

© International Federation for Information Processing 1992

Authors and Affiliations

  • John Franco
    • 1
  1. 1.Department of Computer ScienceUniversity of CincinnatiCincinnati

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