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Structured graph models: An efficient tool for VLSI design

  • Track 9: VLSI Design
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Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 507))

Abstract

Hierarchical graph models are a powerful tool for describing VLSI circuits. They combine the representation of a hierarchical decomposition of a circuit with a graph description of its topological structure in terms of components and connections. Structured Graphs are an example of such models. In this paper we consider the graph-theoretic problems of spanning trees and Steiner trees in structured graphs. These have connections with the global routing problems in VLSI circuits.

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References

  1. M. Ancona, L. De Floriani. Computational Algorithms for Hierarchically Structured Project Networks, Operations Research Letters, vol. 1, no. 5, 1982.

    Google Scholar 

  2. M. Ancona, L. De Floriani, J.S. Deogun. Path Problems in Structured graphs. The Computer Journal, vol. 29, no. 6, 1986.

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  3. M. Ancona, E. Bruzzone, L. De Floriani. The Steiner Problem in structured Graphs. Tech. Rep. I.M.A., 28–88, Genova, 1988.

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  4. L. De Floriani, J.S. Deogun. Structured Graphs and Spanning Trees. Proceedings IEEE COMPSAC'83, Chicago, November 1983.

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  5. F. Harary. Graph Theory. Addison Wesley, Reading, Mass., 1977.

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  6. P. Winter. Steiner Problem in Networks: A Survey. Networks, vol. 17, 1987, pp 129–167.

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Naveed A. Sherwani Elise de Doncker John A. Kapenga

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© 1991 Springer-Verlag Berlin Heidelberg

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Ancona, M., Bagga, K.S., Bruzzone, E., De Floriani, L., Deogun, J.S. (1991). Structured graph models: An efficient tool for VLSI design. In: Sherwani, N.A., de Doncker, E., Kapenga, J.A. (eds) Computing in the 90's. Great Lakes CS 1989. Lecture Notes in Computer Science, vol 507. Springer, New York, NY. https://doi.org/10.1007/BFb0038508

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  • DOI: https://doi.org/10.1007/BFb0038508

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  • Publisher Name: Springer, New York, NY

  • Print ISBN: 978-0-387-97628-0

  • Online ISBN: 978-0-387-34815-5

  • eBook Packages: Springer Book Archive

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