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An automatic speed-up of random access machines with powerful arithmetic instructions

  • Ingolf Wald
Contributed Papers Complexity
  • 123 Downloads
Part of the Lecture Notes in Computer Science book series (LNCS, volume 294)

Abstract

Speeding up automatically means to find a parallel algorithm for an arbitrary sequential one, so that the time for designing this parallel algorithm plus its runtime is considerably lower than the time sequentially used. Here we consider sequential and parallel random access machines (RAMs, PRAMs) with arithmetic instructions {+, −, *}. RAMs work on integer inputs and use direct and a restricted form of indirect addressing, only.

We extend the result of Meyer auf der Heide ([MEYE86]) to RAMs which can also multiply. We use techniques for fast parallel computation of polynomials due to Valiant, Skyum, Berkowitz and Rackoff ([VSBR83]). In order to apply this we have to make their simulation uniform. This result, interesting in itself, is based on an efficient parallelization of straight-line programs with operations {+,max}.

With a PRAM with a processors we gain a speed up factor of \(\frac{{(log log q)^2 + log log q \cdot log D}}{{log q}}\)for any uniform RAM P, where D denotes the formal degree of the polynomials computed by P.

Keywords

Parallel Algorithm Arithmetic Circuit Formal Degree Common Memory Random Access Machine 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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References

  1. [KUCE82]
    Kucera, L.: Parallel Computation and Conflicts in Memory Access, Information Processing Letters 14(2), 1982, pp. 93–96Google Scholar
  2. [MEYE85]
    Meyer auf der Heide, F.: Lower Bounds for Solving Linear Diophantine Equations on several parallel computational models, Information and Control, Vol. 67, Nos. 1–3, 1985, pp. 195–211Google Scholar
  3. [MEYE86]
    Meyer auf der Heide, F.: Speeding up Random Access Machines by Few Processors, Proc. 3rd STACS, 1986, pp. 142–152Google Scholar
  4. [MIRK86]
    Miller, G.L., Ramachandran, V., Kaltofen, E.: Efficient Parallel Evaluation of Straight-line Code and Arithmetic Circuits, VLSI Algorithms and Architectures, Proc. of the Aegean Workshop on Computing, Loutraki, 1986, pp. 236–245Google Scholar
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    Valiant, L.G.: Parallelism in Comparison Problems, SIAM J. Computing, No. 3, 1975, pp. 348–355Google Scholar
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    Vishkin, U.: An Optimal Connectivity Algorithm, preprint, 1985Google Scholar
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    Valiant, L.G., Skyum, S., Berkowitz, S., Rackoff, C.: Fast Parallel Computation of Polynomials Using few Processors, SIAM J. Computing, 12, No. 4, 1983, pp. 641–644Google Scholar
  8. [WALD87]
    Wald, I.: Automatische Parallelisierung von Registermaschinen, Diplomarbeit, J. W. G.-Universität Frankfurt, Fb. 20-Informatik, 1987Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1988

Authors and Affiliations

  • Ingolf Wald
    • 1
  1. 1.Lehrstuhl Informatik IIUniversität DortmundDortmund 50Fed. Rep. of Germany

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