Abstract
A 1024-bit RSA encryption LSI with DES and MD5 functions was developed. An RSA accelerator core implemented in the LSI is 4.9 MM2 in area, and has three 1024-bit adders that perform doubling, squaring, and exponential operations simultaneously. A 1024-bit RSA operation takes 23 msec with 100mA peak current at the maximum frequency of 45 MHz. A 1024-bit RSA key is generated in 0.3 sec by using arithmetic functions supported by the LSI. The throughputs of DES and MD5 at 45 MHz are 18.9 MB/sec and 29.7 MB/sec, respectively.
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Satoh, A., Kobayashi, Y., Niijima, H., Ooba, N., Munetoh, S., Sone, S. (1998). A high-speed small RSA encryption LSI with low power dissipation. In: Okamoto, E., Davida, G., Mambo, M. (eds) Information Security. ISW 1997. Lecture Notes in Computer Science, vol 1396. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0030419
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DOI: https://doi.org/10.1007/BFb0030419
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