Abstract
This paper examines the use of coarse-grained multithreading to lessen the negative impact of memory access latencies on the performance of uniprocessor on-line transaction processing systems. It considers the effect of switching threads on cache misses in a two-level cache system. It also examines several different thread-switch policies. The results suggest that multithreading with a small number (3–5) of active threads can significantly improve the performance of such commercial environments.
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© 1997 Springer-Verlag Berlin Heidelberg
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Eickemeyer, R.J., Johnson, R.E., Kunkel, S.R., Lime, BH., Squillante, M.S., Wu, C.E. (1997). Evaluation of multithreaded processors and thread-switch policies. In: Polychronopoulos, C., Joe, K., Araki, K., Amamiya, M. (eds) High Performance Computing. ISHPC 1997. Lecture Notes in Computer Science, vol 1336. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0024207
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DOI: https://doi.org/10.1007/BFb0024207
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