Modelling hierarchy as guideline for parallel simulation

Abstract

With this paper, a strategy is explained which allows to map the hierarchy of a model onto a network of parallel computing nodes for simulation purposes. It is shown that exploiting hierarchy can support the solution of many computational tasks, especially the devide and conquer approach of partitioning a given problem before solving it. Demonstrated results were gained in the field of logic and fault simulation of digital circuits; the parallel computer used is a transputer net with 40 nodes. The developed approach shows general strategies for a broad class of applications in discret event simulation.