Organization of multi-processor systems for image processing

  • V. Cantoni
Conference paper
Part of the Lecture Notes in Physics book series (LNP, volume 196)


There has been an increasing interest in the analysis of image data with high-speed parallel hardware. The advent of VLSI technology spurred the construction of such systems and several practical commercial applications appeared in the late 70's. Much work has been done to develop parallel processors for low level image processing. However, in the image analysis field an highly effective solution, till now, has not been found. In this paper the nature of image processing tasks is outlined and the organization of the multiprocessor systems which have been developed for these tasks are reviewed.


Computer Architecture Parallel Processor Pipeline Architecture Cellular Array Class Deal 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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  1. 1.
    S. H. Unger, “A Computer Oriented Toward Spatial Problems” Proc. of the IRE, October (1956), pp 1744–1750.Google Scholar
  2. 2.
    M. J. B. Duff, “CLIP4: A Large Scale Integrated Circuit Array Parallel Processor” 3rd International Joint Conference on Pattern Recognition, (1976), pp 728–732.Google Scholar
  3. 3.
    S. F. Readdaway, “The DAP Approach” Infotech State of the Art Report on Supercomputers, Vol. 2, (1979), Pp 836–840.Google Scholar
  4. 4.
    K. E. Batcher, “Design of a Massively Parallel Processor” IEEE Trans. on Computers Vol. C29, No 9 (1980), pp 836–840.Google Scholar
  5. 5.
    K. Preston., Jr. “Cellular logic computer for pattern recognition” Computer, Vol. 16, No 1 (1963), pp 36–47.Google Scholar
  6. 6.
    V, Cantoni, S. Levialdi, C. Guerra, “Towards an evaluation of an. image processing system” in Computational structures for image processing, M. J. B. Duff` ed., Academic Press, (1983), pp 43–56.Google Scholar
  7. 7.
    S. Tanimoto, “Towards a hierarchical cellular logic: design considerations for pyramid machines” TR-81-02-01, University of Washington, Seattle, (1081).Google Scholar
  8. 8.
    B. H. Me Cormick, E. W. Kent, C. R. Dyer, “ HIghly parallel structures for real time image processing” ISL-TR-VRL=13, University of Illinois at Chicago Circle, (1980)Google Scholar
  9. 9.
    S. R. Sternberg, “Parallel Architectures for Image Processing,” Proceedings of the 3rd International IEEE COMPSAC, Chicago, (1979), pp 712–717.Google Scholar
  10. 10.
    D. W. L. Yen and A. V. Kulkarni, “The ESL Systolic Processor for Signal and Image Processing,” IEEE Computer Society Workshop on Computer Architecture for Pattern Analaysis and Image Database Management, Hot Springs, Virginia, November 11–13, (1981), pp 265–272.Google Scholar
  11. 11.
    K. Luetjen, P. Gemmar, H. Ischen, “FLIP: a flexible multiprocessor system for image processing” Proc. 5th Int. Conf. Pattern Recognition, (1980), Miami, pp 326–328.Google Scholar
  12. 12.
    C. Rieger, “ZMOB: Doing it in Parallel,” IEEE Computer Society Workshop on Computer Architecture for Pattern Analysis and Image Database Management, Hot Springs, Virginia, November 11–13, (1981), pp 119–214.Google Scholar
  13. 13.
    K. I. Mori, M. Kidode, H. Shinoda, H. Asada, “Design of local parallel processor fo IP” Proc. AFIPS Conf., Vol. 47, (1978), pp 1025–1032.Google Scholar
  14. 14.
    B. Kruse, B. Gudmundsson, D. Antonsson, “FIP: the PICAP II filter processor” Proc. 5th Int. Conf.. Pattern Recognition, (1980), Miami, pp 484–488.Google Scholar
  15. 15.
    H. J. Siegel, et. al., “PASM: A Partitionable SIMD/MIMD System for Image Processing and Pattern Recognition,” IEEE Trans. on Computers, Vol. C-30, No 12, December (1981).Google Scholar
  16. 16.
    L. Uhr, M: Thompson and J. Lockey, “A 2-Layered SIMD/MIMD Parallel Pyramidal Array/Net,” IEEE Computer Society Workshop on Computer Architecture for Pattern Analaysis and Image Database Management, Hot Springs, Virginia, November 11–13, (1981), pp 209–216.Google Scholar
  17. 17.
    W. Wulf and R. Levi.n, “A Local Network,” DATAMATION, Feb, (1975), pp 47–50.Google Scholar
  18. 18.
    R. J. Swan et al., “Cm* — A modular muiti-microprocessor,” AFIPS Conference Proceedings, Vol. 46, 1977 NCC, pp 637–644.Google Scholar
  19. 19.
    L. D. Wittie, R. S. Curtis and A. J. Frank “MICRONET/MICROS — A Network Computer System for Distributed Applications”, in “Multicomputers and Image Processing: Algorithms and Programs”, K. Preston and L. Uhr eds. Academic Press (1982) pp 307–318.Google Scholar
  20. 20.
    S. Hanaki, T. Temma, “Template-controlled Image Processor” in Multicomputer an Image Processing, K. Preston, L. Uhr eds., Academic Press, (1982).Google Scholar
  21. 21.
    F. A. Briggs, K. Hwang, K. S. Fu, M. Dubois, “PUMPS architecture for pattern analysis and image database management” Proc. Pattern Recognition and Image Processing Conf., Dallas, (1981), pp. 178–187.Google Scholar

Copyright information

© Springer-Verlag 1984

Authors and Affiliations

  • V. Cantoni
    • 1
  1. 1.Dipartimento di Informatica e SisternisticaUniversitá di PaviaPaviaItaly

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