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Virtual topologies: A new concurrency abstraction for high-level parallel languages

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Languages and Compilers for Parallel Computing (LCPC 1995)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1033))

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Abstract

We present a new concurrency abstraction and implementation technique for high-level (symbolic) parallel languages that allows significant programmer control over load-balancing and mapping of fine-grained lightweight threads. Central to our proposal is the notion of a virtual topology. A virtual topology defines a relation over a collection of virtual processors, and a mapping of those processors to a set of physical processors; processor topologies configured as trees, graphs, butterflies, and meshes are some well-known examples. A virtual topology need not have any correlation with a physical one; it is intended to capture the interconnection structure best suited for a given algorithm. We consider a virtual processor to be an abstraction that defines scheduling, migration and load-balancing policies for the threads it executes. Thus, virtual topologies are intended to provide a simple, expressive and efficient high-level framework for defining complex thread/processor mappings that abstracts low-level details of a physical interconnection.

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Authors and Affiliations

Authors

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Chua-Huang Huang Ponnuswamy Sadayappan Utpal Banerjee David Gelernter Alex Nicolau David Padua

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© 1996 Springer-Verlag Berlin Heidelberg

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Philbin, J., Jagannathan, S., Mirani, R. (1996). Virtual topologies: A new concurrency abstraction for high-level parallel languages. In: Huang, CH., Sadayappan, P., Banerjee, U., Gelernter, D., Nicolau, A., Padua, D. (eds) Languages and Compilers for Parallel Computing. LCPC 1995. Lecture Notes in Computer Science, vol 1033. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0014217

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  • DOI: https://doi.org/10.1007/BFb0014217

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  • Print ISBN: 978-3-540-60765-6

  • Online ISBN: 978-3-540-49446-1

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