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High-Speed Transmitter Designs for DDR3 SDRAM Memory Interfaces

  • Lim Zong ZhengEmail author
  • Mohd Tafir Mustaffa
  • Ch’ng Siew Sin
Conference paper
  • 1.7k Downloads
Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 291)

Abstract

This work presents two high-speed transmitter designs for 2.4 Gbps Double Data Rate Generation 3 (DDR3) memory interfaces. The transmitters are designed using 45-nm CMOS process. Moreover, output slew rate of both transmitters is controlled at 4–6 V/ns, while their output impedance can be programmed between 20, 30 and 40 Ω, respectively. Output slew rate and impedance of both the transmitters are calibrated across process, voltage and temperature (PVT) variations. A comparison between Multi-Module Transmitter (MMTX) and Single-Module Transmitter (SMTX) is also presented with low pad capacitance and small far-end eye jitter as the main figures of merit.

Keywords

DDR3 Memory interface Multi-module transmitter Single-module transmitter 

References

  1. 1.
    Jacob B, Ng SW, Wang DT (2007) Memory systems: cache, DRAM, disk. Morgan Kaufmann, San FranciscoGoogle Scholar
  2. 2.
    Lee J, Lee S, Nam S (2010) Multi-slot main memory system for post DDR3. IEEE Trans Circuits Syst II: Express Briefs 57:334–338CrossRefGoogle Scholar
  3. 3.
    Dally WJ, Poulton J (1998) Digital systems engineering. Cambridge University Press, CambridgeCrossRefzbMATHGoogle Scholar
  4. 4.
    Zhang L, Wilson JM, Bashirullah R, Luo L, Xu J, Franzon PD (2007) Voltage-mode driver preemphasis technique for on-chip global buses. IEEE Trans Very Large Scale Integr VLSI Syst 15:231–236CrossRefGoogle Scholar
  5. 5.
    Lim, ZZ, Mustaffa MT, Navaratnam N (2012) A 2.4 Gbps transmitter with programmable de-emphasis scheme for DDR3 memory interface. In: IEEE international conference on 4th intelligent and advanced systems, Kuala Lumpur, vol 2. pp 713–718Google Scholar
  6. 6.
    Liu J, Lin X (2004) Equalization in high-speed communication systems. IEEE Circuits Syst Mag 4:4–17Google Scholar
  7. 7.
    Wong JKL, Hatamkhani H, Mansuri M, Yang KCK (2004) A 27-mW 3.6-Gb/s I/O transceiver. IEEE J Solid-State Circuits 39:602–612CrossRefGoogle Scholar
  8. 8.
    Park C, Chung H, Lee YS, Kim J, Lee JJ, Chae MS, Jung DH, Choi SH, Seo SY, Park TS, Shin JH, Cho JH, Lee S, Song KW, Kim KH, Lee JB, Kim C, Cho SI (2006) A 512-Mb DDR3 SDRAM prototype with CIO minimization and self-calibration techniques. IEEE J Solid-State Circuits 41:831–838CrossRefGoogle Scholar
  9. 9.
    Kalyan G, Srinivas MB (2010) An efficient ODT calibration scheme for improved signal integrity in memory interface. In: IEEE Asia Pacific conference on circuits and systems, Kuala Lumpur, pp 1211–1214Google Scholar
  10. 10.
    Heidar D, Dessouky M, Ragaie HF (2007) Comparison of output drivers for high-speed serial links. In: IEEE international conference on microelectronics, Cairo, pp 329–332Google Scholar
  11. 11.
    Gabara TJ, Knauer SC (1992) Digitally adjustable resistors in CMOS for high-performance applications. IEEE J Solid-State Circuits 27:1176–1185CrossRefGoogle Scholar
  12. 12.
    Ch’ng SS, Marzuki A, Tan SB (2012) Configurable output driver with programmable on-chip impedance supporting wide range data rates. In: IEEE international conference on 4th intelligent and advanced systems, Kuala Lumpur, vol 2. pp 801–806Google Scholar
  13. 13.
    Lim ZZ, Mustaffa MT (2011) An output driver with high-speed level shifter for 1.5 V applications using a 45 nm CMOS process. In: Electrical and electronic postgraduate colloquium, PahangGoogle Scholar
  14. 14.
    Mishra NK, Jain M, Le P, Mukherjee S, Sendhil A, Amirkhany A (2011) An output structure for a bi-modal 6.4-Gbps GDDR5 and 2.4-Gbps DDR3 compatible memory interface. In: IEEE custom integrated circuits conference, San Jose, pp 1–4Google Scholar

Copyright information

© Springer Science+Business Media Singapore 2014

Authors and Affiliations

  • Lim Zong Zheng
    • 1
    Email author
  • Mohd Tafir Mustaffa
    • 2
  • Ch’ng Siew Sin
    • 1
  1. 1.School of Electrical and Electronic EngineeringUniversiti Sains MalaysiaNibong TebalMalaysia
  2. 2.School of Electrical and Electronic EngineeringUniversiti Sains MalaysiaNibong TebalMalaysia

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