Abstract
This paper presents an In-Memory Computation (IMC) architecture using Full Swing Gate Diffusion Input (FS-GDI) in a single-ended disturb-free 6T SRAM. Not only are basic boolean functions (AND, NAND, OR, NOR, XOR2, XOR3, XNOR2) fully realized, a Ripple-Carry Adder (RCA) is also realized such that IMC is feasible without ALU (Arithmetic Logic Unit) or CPU. FS-GDI reserves the benefits of the original GDI, and further resolves the reduced voltage swing issue, but it leads to speed degradation and large static power. Therefore, by using in-memory computing technique, the well-known von-Neumann bottleneck will be mitigated as well as energy efficiency is enhanced.
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Acknowledgements
The investigation was partially supported by Ministry of Science and Technology (MOST), Taiwan, under grant MOST 107-2218-E-110-004- and MOST-107-2218-E-110-016-. The authors would like to express their deepest gratefulness to CIC (Chip Implementation Center) in NARL (Nation Applied Research Laboratories), Taiwan, for the assistance of thoughtful chip fabrication.
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Wang, CC., Sulistiyanto, N., Tsai, TY., Chen, YH. (2020). Multifunctional In-Memory Computation Architecture Using Single-Ended Disturb-Free 6T SRAM. In: Zakaria, Z., Ahmad, R. (eds) Advances in Electronics Engineering. Lecture Notes in Electrical Engineering, vol 619. Springer, Singapore. https://doi.org/10.1007/978-981-15-1289-6_5
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DOI: https://doi.org/10.1007/978-981-15-1289-6_5
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