Abstract
Strained Silicon Metal–Oxide–Semiconductor Field-Effect Transistor (MOSFET) has already proven to be a superb candidate for high-speed electronic devices. A novel strained heterostructure device has been developed consisting of Si/SiGe/Si layer in the channel forming hetero-layered MOS structure. To develop a mature and in-depth understanding of the heterolayer, the analysis for study of behavior and characteristics has been the crux of in this recent works. Thus, the need of understanding this advanced structure through capacitance–voltage (CV) became the essentiality and most fundamental onus leading to device modeling and thorough expectation and control of the device performance.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
V.K. Joshi, Spintronics: a contemporary review of emerging electronics devices. Eng. Sci. Technol. Int. J. 19(3), 1503–1513 (2016)
K.O. Petrosyants, D.A. Popov, High-k gate stacks influence on characteristics of nano-scale MOSFET structures, in 2nd International Conference on Modelling, Identification and Control (2015)
C. Dekker, How we made the carbon nanotube transistor. Nat. Electron. 1(9), 518 (2018)
S. Datta, How we proposed the spin transistor. Nat. Electron. 1(11), 604 (2018)
S. Manipatruni et al., Scalable energy-efficient magnetoelectric spin–orbit logic. Nature 565(7737), 35 (2019)
J.-A. Carballo, W.-T.J. Chan, P.A. Gargini, A.B. Kahng, S. Nath, ITRS 2.0: Toward a re-framing of the semiconductor technology roadmap, in 2014 32nd IEEE International Conference on Computer Design (ICCD) (2014), pp. 139–146
M.V. Fischetti, Z. Ren, P.M. Solomon, M. Yang, K. Rim, Six-band k p calculation of the hole mobility in silicon inversion layers: Dependence on surface orientation, strain, and silicon thickness. J. Appl. Phys. 94(2), 1079–1095 (2003)
L. Kleinman, Deformation potentials in silicon. I. uniaxial strain. Phys. Rev. 128(6), 2614 (1962)
I. Aberg, C.N. Chléirigh, O.O. Olubuyide, X. Duan, J.L. Hoyt, High electron and hole mobility enhancements in thin-body strained Si/strained SiGe/strained Si heterostructures on insulator, in IEEE International on Electron Devices Meeting, 2004. IEDM, Technical Digest (2004), pp. 173–176
T. Pešić-Brđanin, B.L. Dokić, Strained silicon layer in CMOS technology. Electronics 18(2), 63–69 (2014)
L. Khiangte, R.S. Dhar, Development of tri‐layered s‐Si/s‐SiGe/s‐Si channel heterostructure‐on‐insulator MOSFET for enhanced drive current. Phys. Status Solidi 1800034 (2018)
C.S. Smith, Piezoresistance effect in germanium and silicon. Phys. Rev. 94(1), 42 (1954)
R.W. Keyes, High-mobility FET in strained silicon. IEEE Trans. Electron Devices 33(6), 863 (1986)
R.W. Keyes, Explaining strain [in silicon]. IEEE Circuits Devices Mag. 18(5), 36–39 (2002)
K. Datta, A. Shadman, E. Rahman, Q.D.M. Khosru, Trilayer TMDC heterostructures for MOSFETs and nanobiosensors. J. Electron. Mater. 46(2), 1248–1260 (2017)
M. Amato, M. Bertocchi, S. Ossicini, Work function bowing in Si1–x Ge x heterostructures: Ab initio results. J. Appl. Phys. 119(8), 85705 (2016)
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2020 Springer Nature Singapore Pte Ltd.
About this paper
Cite this paper
Dhar, R.S., Khiangte, L., Sultana, P., Kumar, A. (2020). Analysis of Capacitance–Voltage Characteristics for Ultrathin Si/SiGe/Si Hetero-Layered MOS Structure. In: Jain, L., Virvou, M., Piuri, V., Balas, V. (eds) Advances in Bioinformatics, Multimedia, and Electronics Circuits and Signals. Advances in Intelligent Systems and Computing, vol 1064. Springer, Singapore. https://doi.org/10.1007/978-981-15-0339-9_8
Download citation
DOI: https://doi.org/10.1007/978-981-15-0339-9_8
Published:
Publisher Name: Springer, Singapore
Print ISBN: 978-981-15-0338-2
Online ISBN: 978-981-15-0339-9
eBook Packages: EngineeringEngineering (R0)