Abstract
Automatic synthesis methods of reversible circuits are discussed in this chapter. First the basic characteristics of reversible circuits are reviewed, and the difference of logic synthesis methods for general CMOS circuits and reversible circuits are clarified. Then logic synthesis methods for reversible circuits based on exhaustive search, repetition of local circuit transformations, Binary Decision Diagram (BDD) based approaches, SAT-based methods, and hierarchical methods are presented in order. The chapter concludes with discussions on future research topics.
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References
Landauer R (1961) Irreversibility and heat generation in the computing process. IBM J Res Dev 5(3):183–191
Bennett C (1973) Logical reversibility of computation. IBM J Res Dev 17(6):525–532
Brayton RK, Mishchenko A (2010) ABC: an academic industrial-strength verification tool. In: 22nd international conference on computer aided verification (CAV 2010), pp 24–40
Bryant R (1986) Graph-based algorithms for boolean function manipulation. IEEE Trans Comput C-35(8)
Shende VV, Prasad AK, Markov IL, Hayes JP (2002) Reversible logic circuit synthesis. In: ACM/IEEE international conference on computer aided design (ICCAD), San Jose, USA, pp 125–132
Große D, Wille R, Dueck GW, Drechsler R (2009) Exact multiple control Toffoli network synthesis with SAT techniques. IEEE Trans CAD 28(5):703–715
Wille R, Soeken M, Przigoda N, Drechsler R (2012) Exact Synthesis of Toffoli Gate Circuits. In: IEEE 42nd international symposium on multiple-valued logic. Victoria, Canada, pp 69–74 (with Negative Control Lines)
Miller DM, Maslov D, Dueck GW A (2003) Transformation based algorithm for reversible logic synthesis. In: ACM/IEEE design automation conference. Anaheim, USA, pp 318–323
Wille R, Drechsler R (2009) BDD-based synthesis of reversible logic for large functions. In: ACM/IEEE design automation conference. USA, San Francisco pp 270–275
Soeken M, Taguea L, Dueckc GW (2016) RolfDrechsler: ancilla-free synthesis of large reversible functions using binary decision diagrams. J Symb Comput 73:1–26
Soeken M, Chattopadhyay A (2016) Unlocking efficiency and scalability of reversible logic synthesis using conventional logic synthesis. In: ACM/IEEE design automation conference
Iwama K, Kambayashi Y, Yamashita S (2002) Transformation rules for designing CNOT-based quantum circuits. ACM/In: IEEE design automation conference. New Orleans, Louisiana, USA
Kerntopf P (2004) A new heuristic algorithm for reversible logic synthesis. In: ACM/IEEE design automation conference
Maslov D, Dueck GW, Miller DM (2005) Toffoli network synthesis with templates. IEEE Trans CAD 24(6):807–817
Gupta P, Agrawal A, Jha NK (2006) An algorithm for synthesis of reversible logic circuits. IEEE Trans CAD 25(11):2317–2330
Shende VV, Prasad AK, Markov IL, Hayes JP (2003) Synthesis of reversible logic circuits. IEEE Trans CAD 22(6):710–722
Soeken M, Roetteler M, Wiebe N, De Micheli G (2017) Hierarchical reversible logic synthesis using LUTs. In: ACM/IEEE design automation confernece. Austin, USA
Nielsen MA, Chuang IL (2010) Quantum computation and quantum information. Cambridge University Press, Cambridge
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Fujita, M. (2020). Logic Synthesis for Reversible Circuits. In: Singh, A., Fujita, M., Mohan, A. (eds) Design and Testing of Reversible Logic. Lecture Notes in Electrical Engineering, vol 577. Springer, Singapore. https://doi.org/10.1007/978-981-13-8821-7_5
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DOI: https://doi.org/10.1007/978-981-13-8821-7_5
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