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Low Frequency Noise Analysis in Strained-Si Devices

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Emerging Technology in Modelling and Graphics

Part of the book series: Advances in Intelligent Systems and Computing ((AISC,volume 937))

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Abstract

In this paper, the low frequency (1/f) noise (LFN) in strained-Si p-MOSFETs has been modelled by modifying the Hooge’s parameter and implemented using TCAD tools. The 1/f drain current noise characteristics have been investigated with the variation of strain and gate bias and higher noise level is observed in the strained-Si devices. The results obtained from simulation closely matches with reported experimental data.

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Authors and Affiliations

  1. Department of Electronics and Communication Engineering, Siksha ‘O’ Anusandhan (Deemed to be University), Bhubaneswar, 751030, Odisha, India

    Sanghamitra Das, Tara Prasanna Dash & Chinmay Kumar Maiti

Authors
  1. Sanghamitra Das
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  2. Tara Prasanna Dash
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  3. Chinmay Kumar Maiti
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Corresponding author

Correspondence to Tara Prasanna Dash .

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Editors and Affiliations

  1. Department of Computer Science and Engineering, University of Kalyani, Kalyani, West Bengal, India

    Jyotsna Kumar Mandal

  2. Department of Computer Science and Engineering, Institute of Engineering and Management, Kolkata, West Bengal, India

    Debika Bhattacharya

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Das, S., Dash, T.P., Maiti, C.K. (2020). Low Frequency Noise Analysis in Strained-Si Devices. In: Mandal, J., Bhattacharya, D. (eds) Emerging Technology in Modelling and Graphics. Advances in Intelligent Systems and Computing, vol 937. Springer, Singapore. https://doi.org/10.1007/978-981-13-7403-6_37

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  • DOI: https://doi.org/10.1007/978-981-13-7403-6_37

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  • Publisher Name: Springer, Singapore

  • Print ISBN: 978-981-13-7402-9

  • Online ISBN: 978-981-13-7403-6

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