Abstract
As stated by Gosser, “ Securing a computer system has traditionally been a battle of wits: the penetrator tries to find the holes, and the designer tries to close them”. Hence, for any secure program execution, the instruction flow should also be encrypted. However, finding suitable solution to determine the termination point of any encrypted program is still an open challenge. Encrypted termination requires handling of encrypted condition, which is infeasible by existing unencrypted processors. Thus, for outsourcing computations and achieving privacy, designs of processors which operate on encrypted data as well as address are extremely important. This chapter provides some insight on this issue.
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Notes
- 1.
The adder is realized inside the Look Up Tables (LUTs) of the FPGA.
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Chatterjee, A., Aung, K.M.M. (2019). FURISC: FHE Encrypted URISC Design. In: Fully Homomorphic Encryption in Real World Applications. Computer Architecture and Design Methodologies. Springer, Singapore. https://doi.org/10.1007/978-981-13-6393-1_6
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DOI: https://doi.org/10.1007/978-981-13-6393-1_6
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