Abstract
In this paper, device performance of 14 nm FinFETs have analyzed and electrical parameters like Ion, Ioff, Ion/Ioff, SS, DIBL and power dissipation are measured. These devices have also been analyzed in terms of V-I characteristics. Further, the effect of fin width on device performance was investigated by designing similar FinFETs with different top fin width at 14 nm technology. The designed structures have been simulated using drift diffusion model. In order to validate the results, same structures are also designed & simulated with 20 nm gate length. Also, the FinFETs’ performance was optimized using ANN with the PSO algorithm. Both results i.e. optimization results and simulation results were closely matched with 0.48% error.
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Srishti, Kaur, J. (2019). Performance Optimization of FinFET Configurations at 14 nm Technology Using ANN-PSO. In: Rajaram, S., Balamurugan, N., Gracia Nirmala Rani, D., Singh, V. (eds) VLSI Design and Test. VDAT 2018. Communications in Computer and Information Science, vol 892. Springer, Singapore. https://doi.org/10.1007/978-981-13-5950-7_35
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DOI: https://doi.org/10.1007/978-981-13-5950-7_35
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