Abstract
Arithmetic and Logic Unit is the fundamental building block of almost all the digital devices. ALU is the heart of the Central Processing Unit (CPU) of the computer. It is generally used to perform the arithmetic and logical operations in the device. ALU can perform arithmetic operations like addition, subtraction, multiplication, increment, decrement, shift operations, and logical operations like AND, OR, XOR, NAND, NOR, etc. Any digital device has its characteristics; based on its characteristics ALU is configured. The parameters like the speed of operation, power, accuracy, etc., are taken care during the design. This paper presents the design of 8-bit ALU which performs 16 operations in 45 and 90 nm technology and compares parameters like power and delay.
This is a preview of subscription content, log in via an institution.
Buying options
Tax calculation will be finalised at checkout
Purchases are for personal use only
Learn about institutional subscriptionsReferences
Koppad D, Hiremath S. Low power 1-bit full adder circuit using modified gate diffusion input (GDI). In: Conference on first international micro and nano technologies
Uma R, Davachelvan P. Low power and high speed adders in modified gate diffusion input technique. In: Computer networks & communications (NetCom)
Esther Rani T, Asha Rani M, Rao R (2011) Area optimized low power arithmetic and logic unit. 978-1-4244-8679-3/11/$26.00 ©2011, IEEE
Wolf W (1998) Modern VLSI design—systems on silicon. Prentice Hall
Tsividis Y (1999) Operation and modeling of the MOS transistor. Mc Graw-Hill
Anitha D, Chari KM (2014, Oct) Low power ALU design considering PVT variations. Int J Comput Appl 104(17)
Kamaraju M, Kishore KL, Tilak AVN (2010, Dec) Power optimized ALU for efficient datapath. Int J Comput Appl 11(11)
Swetha S (2016, July) Design of low power and area efficient full adder using modified gate diffusion input. Int J Comput Appl 145(8)
Salehi S, DeMara RF (2015) Energy and area analysis of a floating point unit in 15 nm CMOS process technology. In: Proceedings of IEEE Southeast conference 2015 (SECon-2015), Fort Lauderdale, FL, 9–12 April 2015
Clark LT, Hoffman EJ, Miller J, Biyani M, Liao Y, Strazdus S, Morrow M, Velarde KE, Yarch MA (2001) An embedded 32-b Microprocessor Core for low-power and high performance applications. IEEE J Solid-State Circ 36(11):1599–1608
Deleganes DJ, Barany M, Geannopoulos G, Kreitzer K, Morrise M, Milliron D, Singh AN, Wijeratne S (2005) Low-voltage swing logic circuits for a Pentium ® 4 Processor Integer Core. IEEE J Solid-State Circ 40(1):36–43
Pilmeier MR (2002) Barrel shifter design, optimization and analysis. Lehigh University, Jan 2002
Priyanka Mandal, Siddhant Malani, Palsodkar PM. VLSI implementation of barrel shifter. In: Proceedings of SPIT-IEEE colloquium and international conference, Mumbai, India
Pappachan R, Vijaykumar V, Ravi T, Kannan V (2013) Design and analysis of 4-bit low-power barrel shifter in 20 nm FINFET technology. IJES 2(3):17–25
Bhattacharyya P, Kundu B, Ghosh S, Kumar V, Dandapat A (2015) Performance analysis of a low-power high-speed hybrid 1-bit full adder circuit. IEEE Trans Very Large Scale Integr (VLSI) Syst 23(10):2001–2008
Srivastava A, Srinivasan C (2002) ALU design using reconfigurable CMOS logic.Preview the documentView in a new window. Circuits and Systems, 2002. MWSCAS-2002. The 2002 45th Midwest Symposium on. (vol 2), IEEE, 2002
Acknowledgements
Behind every achievement, there is unfathomable sea of gratitude to those who supported it and without whom it would ever have been a success one. We are thankful to Principal and head of department for their support and encouragement.
Author information
Authors and Affiliations
Corresponding authors
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2019 Springer Nature Singapore Pte Ltd.
About this paper
Cite this paper
Swapna Rani, T., Bhardwaj, K.K. (2019). Comparative Analysis of 8-Bit ALU in 90 and 45 nm Technologies Using GDI Technique. In: Saini, H., Singh, R., Kumar, G., Rather, G., Santhi, K. (eds) Innovations in Electronics and Communication Engineering. Lecture Notes in Networks and Systems, vol 65. Springer, Singapore. https://doi.org/10.1007/978-981-13-3765-9_42
Download citation
DOI: https://doi.org/10.1007/978-981-13-3765-9_42
Published:
Publisher Name: Springer, Singapore
Print ISBN: 978-981-13-3764-2
Online ISBN: 978-981-13-3765-9
eBook Packages: EngineeringEngineering (R0)