Abstract
Power consumption reduction in out-of-order superscalar processor has become very important in recent era due to the utilization of superscalar processor in all portable systems. Register Files is the one of the power-hungry source in the out-of-order processor design. The proposed design of Register File using power gating technique reduces both static power and dynamic power dissipation. The new design of Register also includes with a minimal amount of redesign and verification efforts, the minimum level of design risk and least amount of hardware overhead and without any significant impact on the performance of the out-of-order superscalar processor.
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Muralidharan, K., Sridevi, K. (2019). Reducing Power in Register Files for CAM- and SRAM-Based Processor Units. In: Saini, H., Singh, R., Kumar, G., Rather, G., Santhi, K. (eds) Innovations in Electronics and Communication Engineering. Lecture Notes in Networks and Systems, vol 65. Springer, Singapore. https://doi.org/10.1007/978-981-13-3765-9_41
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DOI: https://doi.org/10.1007/978-981-13-3765-9_41
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