Design of Differential Amplifier Using Current Mirror Load in 90 nm CMOS Technology

  • Payali Das
  • Suraj Kumar Saw
  • Preetisudha MeherEmail author
Conference paper
Part of the Advances in Intelligent Systems and Computing book series (AISC, volume 862)


In this article, a differential amplifier with a moderate gain of 40.56 dB is achieved. The UGF of 46.985 dB and phase margin of 84.15 degrees with a low power consumption of 61.084 uW. It is designed by using 90 nm CMOS technology in CADENCE VIRTUOSO platform by applying a supply voltage of 1.2 V with an ICMR of −296.098 mV–1.158 V. The post-layout simulations are also carried out and the results are being compared to the pre-layout results. Finally, a comparison is also drawn with some recent works.


Differential amplifier UGF (unity gain Frequency) Post-layout CMRR (Common mode rejection Ratio) 


  1. 1.
    W. Wilson, T. Chen, R. Selby, in A Current-Starved Inverter-Based Differential Amplifier Design for Ultra-Low Power Applications (IEEE, 2013)Google Scholar
  2. 2.
    P.T. Tran, in Operational Amplifier Design with Gain-Enhancement Differential Amplifier (IEEE, 2012), pp. 6248–6253Google Scholar
  3. 3.
    C.L. Singh, A.J. Gogoi, C. Anandini, K.L. Baishnab, in Low-Noise CMOS Differential-Amplifier Design Using Automated-Design Methodology (IEEE, 2017), pp. 326–330Google Scholar
  4. 4.
    S.M.S. Rashid, A. Roy, S.N. Ali, A.B.M.H. Rashid, Design of A 21 GHz UWB differential low noise amplifier using .13 µm CMOS process, in ISIC (2009), pp. 538–541Google Scholar
  5. 5.
    E.K.F. Lee, Low-voltage op amp design and differential difference amplifier design using linear transconductor with resistor input. IEEE Trans. Circ. Syst. II Analog Digital Signal Proc. 47(8), 776–778 (2000)CrossRefGoogle Scholar
  6. 6.
    T.-S. Lee, H.-Y. Chung, S.-M. Cai, Design techniques for low-voltage fully differential CMOS switched-capacitor amplifiers, in ISCAS (2006), pp. 2825–2828Google Scholar
  7. 7.
    E.M. Spinelli, M.A. Mayosky, C.F. Christiansen, Dual-mode design of fully differential circuits using fully balanced operational amplifiers. IET Circ. Devices Syst. 2(2), 243–248 (2008)CrossRefGoogle Scholar
  8. 8.
    H.-K. Chiou, H.-Y. Liao, K.C. Liang, Compact and low power consumption K-band differential low-noise amplifier design using transformer feedback technique. IET Microwave Antenna Propag. 2(8), 871–879 (2008)CrossRefGoogle Scholar
  9. 9.
    A. Pandey, S. Chakraborty, V. Nath, Slew rate enhancing technique in Darlington pair based CMOS op-amp. ARPN J. Eng. Appl. Sci. 10(9), 3972–3973 (2015)Google Scholar
  10. 10.
    L. Wang, Y.-S. Yin, X.-Z. Guan, in Design of a gain-boosted telescopic fully differential amplifier with CMFB circuit (IEEE, 2012), pp. 252–255Google Scholar
  11. 11.
    N. Bako, Ž. Butkovi, A. Bari, Design of fully differential folded cascode operational amplifier by the gm/ID methodology, in MIPRO (2010), pp. 89–94Google Scholar
  12. 12.
    D. Guckenberger, K.T. Kornegay, Design of a differential distributed amplifier and oscillator using close-packed interleaved transmission lines. IEEE J. Solid-State Circ. 40(10), 1997–23007 (2005)CrossRefGoogle Scholar
  13. 13.
    T. LaRocca, J.Y.-C. Liu, M.-C.F. Chang, 60 GHz CMOS amplifiers using transformer coupling and artificial dielectric differential transmission lines for compact design. IEEE J. Solid-State Circ. 44(5), 1425–1435 (2009)CrossRefGoogle Scholar

Copyright information

© Springer Nature Singapore Pte Ltd. 2019

Authors and Affiliations

  • Payali Das
    • 1
  • Suraj Kumar Saw
    • 1
  • Preetisudha Meher
    • 1
    Email author
  1. 1.Department of Electronics and Communication EngineeringNational Institute of Technology, Arunachal PradeshYupiaIndia

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