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9T and 8T Full Subtractor Design Using Modified GDI and 3T XOR Technique

  • Shubham SarkarEmail author
  • Sujan Sarkar
  • Arun Atta
  • Tuhin Pahari
  • Nishanta Majumdar
  • Sourav Mondal
Conference paper
Part of the Lecture Notes in Networks and Systems book series (LNNS, volume 41)

Abstract

Circuit designing is an emerging field and as per the recent trend it evolves digital devices in use—portable as well as smaller in size. This paper proposes two designs of full subtractor circuit based upon eight and nine transistors demonstrating low power consumption and high-speed switching. The combination of 3T XOR and modified gate diffusion input (M-GDI) technique has been implied to realize the circuits. The circuit realization and simulations have been performed using DSCH 3.5. The design has been further verified and simulated in Xilinx ISE 14.7 environment, coded using Verilog HDL.

Keywords

Circuit Low power High speed Subtractor Gate diffusion input (GDI) Modified gate diffusion input (M-GDI) 3T XOR DSCH 3.5 Verilog HDL 

References

  1. 1.
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    Shekhawat, V., Sharma, T., Sharma, K.G.: 2-bit magnitude comparator using GDI technique. In: IEEE International Conference on Recent Advances and Innovations in Engineering (ICRAIE-2014), 09–11 May 2014, Jaipur, IndiaGoogle Scholar
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    Singh, H., Kumar, R.: 10-T full subtraction logic using GDI technique. In: 2014 Sixth International Conference on Computational Intelligence and Communication NetworksGoogle Scholar
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    Uma, R., Dhavachelvan, P.: Modified gate diffusion input technique: a new technique for enhancing performance in full adder circuits. In: 2nd International Conference on Communication, Computing & Security (ICCCS-2012)Google Scholar

Copyright information

© Springer Nature Singapore Pte Ltd. 2019

Authors and Affiliations

  • Shubham Sarkar
    • 1
    Email author
  • Sujan Sarkar
    • 1
  • Arun Atta
    • 1
  • Tuhin Pahari
    • 1
  • Nishanta Majumdar
    • 1
  • Sourav Mondal
    • 1
  1. 1.Department of Electronics and Communication EngineeringJalpaiguri Government Engineering CollegeJalpaiguriIndia

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