Abstract
I-V measurement of electrochemically etched porous Si layer with planner electrode geometry shows negative differential resistance at high bias. This has been explained on the basis of band gap distribution of charge carriers in nanorods of different sizes distributed randomly in the active layer. The carriers follow the low resistive path through the larger rods at smaller applied voltage. But the probability of transport through smaller rods increases at higher voltage due to phonon bottleneck that hinders the relaxation of injected higher energy carriers at the band edges through phonon interaction. The effective charge carrier concentration decreases for smaller rods resulting in the observed negative differential resistance. The flow of charge carrier through nanorods is modelled as random walk in 2D and the simulated I-V characteristics shows a qualitative matching with the experimentally obtained ones.
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Sudipta Chakrabarty acknowledges Department of Science and Technology (DST), Government of India for INSPIRE fellowship.
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Chakrabarty, S., Hossain, S.M. (2019). Negative Differential Resistance in Random Array of Silicon Nanorods. In: Biswas, U., Banerjee, A., Pal, S., Biswas, A., Sarkar, D., Haldar, S. (eds) Advances in Computer, Communication and Control. Lecture Notes in Networks and Systems, vol 41. Springer, Singapore. https://doi.org/10.1007/978-981-13-3122-0_35
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