Probing Material Interfaces in Nanowire Devices Using Capacitive Measurements

Abstract

Semiconductor devices are systems composed of multiple materials, and their functionality depends on the junctions and interfaces between these materials. In this chapter, I demonstrate a method to study junctions and interfaces in one-dimensional nanoscale semiconductor materials. Examined are insulator interface and dopant profile in vapor-liquid-solid (VLS) -grown silicon nanowires, the electronic properties of the native surface of InAs nanowires grown using bottom-up methods, and metal-carbon nanotube (CNT) Schottky contacts. Specifically, I used capacitance-voltage (C-V) measurements to examine these junctions and interfaces. For the Si nanowire, I used this technique to obtain the density of trap states at its interface with Al₂O₃ insulator. The dopant profile in Si nanowires was found to agree well with predictions from interstitial- and vacancy-assisted diffusion model, as in bulk Si material. For InAs nanowires, I used the C-V technique to extract the trap density of its native surface. The trap lifetime in these InAs nanowires, extracted using the C-V method, depends on the energy separation between the trap state and the conduction band, similarly to bulk materials. Lastly, I examined the metal-CNT Schottky junction using an instrumentation capable of rapid measurement of attofarad (10⁻¹⁸ F)-level capacitances. It was revealed that there is a larger-than-expected capacitance between the metal contact and the CNT and that this capacitance depends strongly on the apparent Schottky barrier height (SBH). The commonly assumed model where the electrical contact to the nanotube ends abruptly at the metal junction needs considerable revision.