Skip to main content
SpringerLink
Log in
Book cover

Emerging Technologies in Data Mining and Information Security pp 465–477Cite as

Reversible Code Converters Based on Application Specific Four Variable Reversible Gates

  • Conference paper
  • First Online:

Part of the book series: Advances in Intelligent Systems and Computing ((AISC,volume 755))

Abstract

The rising research in reversible logic, estimating it to be latent alternative for CMOS, has paved the way for several proposals for reversible logic synthesis. Application oriented reversible circuit designs are witnessed in almost every aspect of digital communication. It is this very interest that the present study proposes binary to gray code converters and vice versa as two independent four variable reversible gates. The converters have been conceptualized as four variable reversible gates having potential to realize efficient parity generator/checker circuits exhibiting better peer comparison results. Hence the work in this paper may find acceptance in reversible cryptography as well as XOR intensive operations in image processors. Also by virtue of definition, reversibility supports lossless communication as information loss is arrested in subsequent stages of information transfer in a reversible function.

This is a preview of subscription content, log in via an institution.

Chapter
USD   29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD   229.00
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD   299.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Learn about institutional subscriptions

References

  1. Landauer, R.: Irreversibility and heat generation in the computing process. IBM J. Res. Dev. 5(3), 183–191 (1961)

    Article  MathSciNet  Google Scholar 

  2. Bennett, C.H.: Logical reversibility of computation. IBM J. Res. Develop. 17, 525–532 (1973)

    Article  MathSciNet  Google Scholar 

  3. Lent, C., Tougaw, P., Porod, W., Bernstein, G.: Quantum cellular automata. Nanotechnology 4(1), 49–57 (1993)

    Article  Google Scholar 

  4. Sultana, M., Prasad, M., Roy, P., Sarkar, S., Das, S., Chaudhuri, A.: Comprehensive quantum analysis of existing four variable reversible gates. In: 2017 Devices for Integrated Circuit (DevIC), pp. 116–120. IEEE, Kolkata (2017)

    Google Scholar 

  5. Toffoli, T.: Reversible Computing. Tech Memo MIT/LCS/TM-151. MIT Lab for Computer Science (1980)

    Google Scholar 

  6. Fredkin, E., Toffoli, T.: Conservative logic. Int. J. Theor. Phys. 21, 219–253 (1982)

    Article  MathSciNet  Google Scholar 

  7. Feynman, R.: Quantum mechanical computers. Opt. News 11, 11–20 (1985)

    Article  Google Scholar 

  8. Peres, A.: Reversible logic and quantum computers. Phys. Rev. A 32(6), 3266–3276 (1985)

    Article  MathSciNet  Google Scholar 

  9. Maslov, D., Dueck, G., Miller, D.: Synthesis of Fredkin–Toffoli reversible networks. IEEE Trans. Very Large Scale Integr. VLSI Syst. 13(6), 765–769 (2005)

    Article  Google Scholar 

  10. Vasudevan, D., Lala, P., Di, J., Parkerson, J.: Reversible-logic design with online testability. IEEE Trans. Instrum. Meas. 55(2), 406–414 (2006)

    Article  Google Scholar 

  11. Thapliyal, H., Srinivas, M.: Novel reversible ‘TSG’ Gate and its application for designing components of primitive reversible/quantum ALU. In: Fifth International Conference on Information, Communications and Signal Processing (2005)

    Google Scholar 

  12. Maity, G., Maity, S.: Implementation of HNG using MZI. In: Third International Conference on Computing Communication & Networking Technologies (ICCCNT), pp. 1–6 (2012)

    Google Scholar 

  13. Sengupta, D., Sultana, M., Chaudhuri, A.: Realization of a novel reversible SCG Gate and its application for designing parallel adder/subtractor and match logic. Int. J. Comput. Appl. 31(9), 30–35 (2011)

    Google Scholar 

  14. James, R., Jacob, K., Sasi, S.: Design of compact reversible decimal adder using RPS gates. In: World Congress on Information and Communication Technologies (WICT), pp. 344–349 (2012)

    Google Scholar 

  15. Haghparast, M., Navi, K.: A Novel reversible full adder circuit for nanotechnology based systems. J. Appl. Sci. 7(24), 3995–4000 (2007)

    Article  Google Scholar 

  16. Haghparast, M., Navi, K.: A novel reversible BCD adder for nanotechnology based systems. Am. J. Appl. Sci. 5(3), 282–288 (2008)

    Article  Google Scholar 

  17. Islam, M., Rahman, M., Begum, Z.: Fault tolerant reversible logic synthesis: carry look-ahead and carry-skip adders. In: International Conference on Advances in Computational Tools for Engineering Applications, ACTEA ’09, pp. 396–401 (2009)

    Google Scholar 

  18. Rashmi, S., Umarani, T., Shreedhar, H.: Optimized reversible montgomery multiplier. Int. J. Comput. Sci. Inf. Technol. 2(2), 701–706 (2011)

    Google Scholar 

  19. Arun, M., Saravanan, S.: Reversible Arithmetic Logic Gate (ALG) for quantum computation. Int. J. Intell. Eng. Syst. 6(3), 1–9 (2013)

    Google Scholar 

  20. Biswas, A., Hasan, M., Chowdhury, A., Babu, H.: Efficient approaches for designing reversible Binary Coded Decimal adders. Microelectron. J. 39(12), 1693–1703 (2008) (Elsevier)

    Google Scholar 

  21. Biswas, P., Gupta, N., Patidar, N.: Basic reversible logic gates and it’s QCA implementation. Int. J. Eng. Res. Appl. 4(6), 12–16 (2014)

    Google Scholar 

  22. Shukla, V., Singh, O., Mishra, G., Tiwari, R.: Application of CSMT gate for efficient reversible realization of binary to gray code converter circuit. In: 2015 IEEE UP Section Conference on Electrical Computer and Electronics (UPCON), pp. 1–6 (2015)

    Google Scholar 

  23. Bhagyalakshmi, H., Venkatesha, M.: Design of a multifunction BVMF reversible logic gate and its applications. Int. J. Comput. Appl. 32(3), 0975–8887 (2011)

    Google Scholar 

  24. Sultana, M., Chaudhuri, A., Sengupta, D., Chaudhuri, A.: Logic design and quantum mapping of a novel four variable reversible s2c2 gate. In: Nature, S., (ed.): CSI 2017—52nd Annual Convention of Computer Society of India, Kolkata (2018) (in Press)

    Google Scholar 

  25. Chaudhuri, A., Sultana, M., Sengupta, D., Chaudhuri, A.: A novel reversible two’s complement gate (TCG) and its quantum mapping. In: 2017 Devices for Integrated Circuit (DevIC), pp. 252–256. IEEE, Kolkata (2017)

    Google Scholar 

  26. Arabzadeh, M., Saeedi, M.: RCViewer+: A viewer/analyzer for reversible and quantum circuits (2008–2013, version 2.5)

    Google Scholar 

  27. Saravanan, M., Manic, K.S.: Energy efficient code converters using reversible logic Gates. In: Proceedings of 2013 International Conference on Green High Performance Computing, India, Mar 2013

    Google Scholar 

  28. Kamani, K., Koneti, S., Bollampalli, U., Shankara, S.: Energy efficient reversible logic design for code converters. Int. J. Res. Appl. 1(3), 132–136 (2014)

    Google Scholar 

  29. Haghparast, M., Hajizadeh, M., Bashiri, R.: On the synthesis of different nanometric reversible converters. Middle-East J. Sci. Res. 7(5), 715–720 (2011)

    Google Scholar 

  30. Das, J., De, D.: Quantum-dot cellular automata based reversible low power parity generator and parity checker design for nanocommunication. Front. Inf. Technol. Electron. Eng. 3, 224–236 (2016–17)

    Google Scholar 

  31. Gayathri, S., Ananthalakshmi, A.: Design and implementation of efficient reversible even parity checker and generator. In: International Conference on Science Engineering and Management Research (ICSEMR), pp. 1–4 (2014)

    Google Scholar 

  32. Mustafa, M., Beigh, M.: Design and implementation of quantum cellular automata based novel parity generator and checker circuits with minimum complexity and cell count. Indian J. Pure Appl. Phys. 51, 60–66 (2013)

    Google Scholar 

Download references

Author information

Authors and Affiliations

  1. Future Institute of Engineering & Management, Kolkata, 700150, India

    Sanjoy Banerjee & Abhijit Kumar Pal

  2. Techno India College of Technology, Kolkata, 700156, India

    Mahamuda Sultana

  3. Techno India – Batanagar, Kolkata, 700141, India

    Diganta Sengupta

  4. RCC Institute of Information Technology, Kolkata, 700015, India

    Abhijit Das

Authors
  1. Sanjoy Banerjee
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Abhijit Kumar Pal
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Mahamuda Sultana
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. Diganta Sengupta
    View author publications

    You can also search for this author in PubMed Google Scholar

  5. Abhijit Das
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Diganta Sengupta .

Editor information

Editors and Affiliations

  1. Machine Intelligence Research Labs, Auburn, WA, USA

    Ajith Abraham

  2. Department of Computer and Systems Sciences, Visva-Bharati University, Santiniketan, West Bengal, India

    Paramartha Dutta

  3. Department of Computer Science and Engineering, University of Kalyani, Kalyani, India

    Jyotsna Kumar Mandal

  4. Institute of Engineering and Management, Kolkata, West Bengal, India

    Abhishek Bhattacharya

  5. Institute of Engineering and Management, Kolkata, West Bengal, India

    Soumi Dutta

Rights and permissions

Reprints and permissions

Copyright information

© 2019 Springer Nature Singapore Pte Ltd.

About this paper

Check for updates. Verify currency and authenticity via CrossMark

Cite this paper

Banerjee, S., Pal, A.K., Sultana, M., Sengupta, D., Das, A. (2019). Reversible Code Converters Based on Application Specific Four Variable Reversible Gates. In: Abraham, A., Dutta, P., Mandal, J., Bhattacharya, A., Dutta, S. (eds) Emerging Technologies in Data Mining and Information Security. Advances in Intelligent Systems and Computing, vol 755. Springer, Singapore. https://doi.org/10.1007/978-981-13-1951-8_42

Download citation

Publish with us

Policies and ethics

Search

Navigation