Skip to main content

Computing Surface Potential and Drain Current in Nanometric Double-Gate MOSFET Using Ortiz-Conde Model

  • Conference paper
  • First Online:
Book cover Contemporary Advances in Innovative and Applicable Information Technology

Part of the book series: Advances in Intelligent Systems and Computing ((AISC,volume 812))

Abstract

Surface potential of lightly doped symmetric double-gate MOSFET is analytically evaluated using Ortiz-Conde model for different structural dimensions in nanometric range, and corresponding drain current is evaluated for lower region of applied bias. The device dimension is considered in nanometer range, and due to light doping, the result of potential distribution exhibits increasing nature with gate voltage, where potential drop across dielectric layer is taken into account for realistic calculation. Pinch-off voltage dependence on material and structural parameters is estimated from static characteristics, and corresponding drain resistance is calculated. Simulated findings are very close to the previously obtained results. Result will help to design DG for low power application.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 84.99
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 109.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

References

  1. Taur, Y., Liang, X., Wang, W., Lu, H.: A continuous, analytic drain-current model for DG MOSFETs. IEEE Electron Device Lett. 25(2), 107–109 (2004)

    Article  Google Scholar 

  2. Subrahmanyam, B., Kumar, M.J.: Recessed source concept in nanoscale vertical surrounding gate (VSG) MOSFETs for controlling short-channel effects. Phys. E 41(4), 671–676 (2009)

    Article  Google Scholar 

  3. Jimenez, D., Iniguez, B., Sune, J., Marsal, L.F., Pallares, J., Roig, J., Flores, D.: Continuous analytic I–V model for surrounding-gate MOSFETs. IEEE Electron Device Lett. 25(8), 571–573 (2004)

    Article  Google Scholar 

  4. Li, Y., Chou, H.M.: A comparative study of electrical characteristic on sub-10-nm double-gate MOSFETs. IEEE Trans. Nanotechnol. 4, 645–647 (2005)

    Article  Google Scholar 

  5. Li, Y., Yu, S.M.: A unified quantum correction model for nanoscale single- and double-gate MOSFETs under inversion condition. Nanotechnology 15, 1009–1016 (2004)

    Article  Google Scholar 

  6. Pao, H.C., Sah, C.T.: Effect of diffusion current on characteristics of metal-oxide (insulator)-semiconductor transistors. Solid State Electron. 9(10), 927–937 (1966)

    Article  Google Scholar 

  7. Chang, S., Wang, G., Huang, Q., Wang, H.: Analytic model for undoped symmetric double-gate MOSFETs with small gate-oxide-thickness asymmetry. IEEE Trans. Electron Devices 56(10), 2297–2301 (2009)

    Article  Google Scholar 

  8. Yu, B., Lu, H., Liu, M., Taur, Y.: Explicit continuous models for double-gate and surrounding-gate MOSFETs. IEEE Trans. Electron Devices 54(10), 2175–2722 (2007)

    Google Scholar 

  9. Ortiz-Conde, A., Garcia-Sanchez, F.J.: A rigorous classical solution for the drain current of doped double-gate MOSFETs. IEEE Trans. Electron Devices 59(9), 2390–2395 (2012)

    Article  Google Scholar 

  10. Lo, S.C., Li, Y., Yu, S.M.: Analytical solution of nonlinear Poisson equation for symmetric double-gate metal-oxide-semiconductor field effect transistors. Math. Comput. Model. 46, 180–188 (2007)

    Article  MathSciNet  Google Scholar 

  11. Abebe, H., Cumberbatch, E., Morris, H., Tyree, V., Numata, T., Uno, S.: Symmetric and asymmetric double gate MOSFET modeling. J. Semicond. Technol. Sci. 9(4), 225–232 (2009)

    Article  Google Scholar 

  12. Cobianu, O., Glesner, M.: A computationally efficient method for analytical calculation of potentials in undoped symmetric DG SOI MOSFET. Techn. Proc. NSTI Nanotechnol. Conf. Trade Show Compact Model. 3(7), 804–807 (2006)

    Google Scholar 

  13. Ortiz-Conde, A., Garcia-Sanchez, F.J., Muci, J., Malobabic, S., Liou, J.J.: A review of core compact models for undoped double-gates SOI MOSFETs. IEEE Trans. Electron Devices 54(1), 131–140 (2007)

    Article  Google Scholar 

  14. Nandi, A., Saxena, A.K., Dasgupta, S.: Analytical modeling of a double gate MOSFET considering source/drain lateral Gaussian doping profile. IEEE Trans. Electron Devices 60(11), 3705–3709 (2013)

    Article  Google Scholar 

  15. Sayed, S., Khan, M.Z.R.: Analytical modeling of surface accumulation behavior of fully depleted SOI 4 GATE transistors (G(4)-FETs). Solid State Electron. 81, 105–112 (2013)

    Article  Google Scholar 

  16. Jurczak, M., Jakubowski, A., Lukasiak, L.: The effects of high doping on the I–V characteristics of a thin-film SOI MOSFET. IEEE Trans. Electron Devices 45(9), 1985–1992 (1998)

    Article  Google Scholar 

  17. Jandhyala, S., Mahapatra, S.: An efficient robust algorithm for the surface-potential calculation of independent DG MOSFET. IEEE Trans. Electron Devices 58(6), 1663–1671 (2011)

    Article  Google Scholar 

  18. Zhou, X., Zhu, Z., Rustagi, S.C., See, G.H., Zhu, G., Lin, S., Wei, C., Lim, G.H.: Rigorous surface-potential solution for undoped symmetric double-gate MOSFETs considering both electron and holes at quasi nonequilibrium. IEEE Trans. Electron Devices 55(2), 616–623 (2008)

    Article  Google Scholar 

  19. He, J., Bian, W., Tao, Y., Liu, F., Lu, K., Wu, W., Wang, T., Chan, M.: An explicit current–voltage model for undoped double-gate MOSFETs based on accurate yet analytic approximation to the carrier concentration. Solid State Electron. 51(1), 179–185 (2007)

    Article  Google Scholar 

  20. Ortiz-Conde, A., Garcia-Sanchez, F.J., Muci, J.: Rigorous analytical solution for drain current of undoped symmetric dual-gate MOSFETs. Solid State Electron. 49(4), 640–647 (2005)

    Article  Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Krishnendu Roy .

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2019 Springer Nature Singapore Pte Ltd.

About this paper

Check for updates. Verify currency and authenticity via CrossMark

Cite this paper

Roy, K., Chowdhury, A.R., Deyasi, A., Sarkar, A. (2019). Computing Surface Potential and Drain Current in Nanometric Double-Gate MOSFET Using Ortiz-Conde Model. In: Mandal, J., Sinha, D., Bandopadhyay, J. (eds) Contemporary Advances in Innovative and Applicable Information Technology. Advances in Intelligent Systems and Computing, vol 812. Springer, Singapore. https://doi.org/10.1007/978-981-13-1540-4_5

Download citation

Publish with us

Policies and ethics