Research on Robust Timing Receiver with Joint Verification of Location and Clock Offset

Abstract

GNSS timing receiver is widely used in various fields. Unfortunately, it has weak capability of anti-jamming and anti-spoofing, so an integrated processing technique based on joint verification of location and clock offset is proposed. The algorithm is verified by simulation with timing receiver data. Simulation results show that 95% probability of the spherical error of location result can be used as the threshold of the location to detect strong intentional or unintentional jamming signal efficiently. When the location check is passed, the clock offset checking is used to monitor the receiver clock offset anomaly, with processing error less than 0.2 ns. The joint verification of location and clock offset method can greatly improve the robust performance of timing receivers.