Abstract
This chapter describes a reconfigurable cryptographic processor designed by the reconfigurable computing research team at the Institute of Microelectronics, Tsinghua University, and the processor is named Anole. Anole is designed for various symmetric cryptographic algorithms and hash algorithms, and its core structure includes a dynamically and partially reconfigurable processing array and the interconnection between processing elements for the function enhancement. The design optimization goal is to improve the energy and area efficiencies while maintaining flexibility. Three key technologies have been proposed including distributed control network (DCN), concurrent computation and reconfiguration (CCR), and configuration compression and organization (CCO). The basic architecture, key technologies, integrated development tools and chip implementation results of Anole are presented in detail as follows:
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Liu, L., Wang, B., Wei, S. (2018). Examples of Reconfigurable Cryptographic Processor Design. In: Reconfigurable Cryptographic Processor. Springer, Singapore. https://doi.org/10.1007/978-981-10-8899-5_5
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DOI: https://doi.org/10.1007/978-981-10-8899-5_5
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