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Compilation Method of Reconfigurable Cryptographic Processors

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Reconfigurable Cryptographic Processor

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Abstract

As an implementation of reconfigurable computing processors in specific fields, a reconfigurable cryptographic processor inherits the basic compilation framework of reconfigurable computing processors: The algorithm is described in high-level programming languages; the hardware and software partition is made through the static or dynamic analysis; then, the hardware part is transformed into the universal intermediate representation through the front-end compilation tools, which is then optimized through the middle-end compilation tools; finally, the mapping is implemented through back-end compilation tools including the synthesis tool, placement and routing tool, and the configuration information of the reconfigurable computing structure is generated. This chapter will be based on this framework and consider the particularity of the compilation method of reconfigurable cryptographic processors. As a cipher algorithm has many obvious code features such as the fixed-boundary loop, loop-carried data dependency, simple control flow, and quite different data granularity, the compilation method of the compiler of a reconfigurable cryptographic processor needs to be optimized based on these features. This chapter will start with general reconfigurable computing processors and introduce their universal compilation technologies and methods, including the main steps throughout compilation process. Then, this chapter will discuss the compilation methods of reconfigurable cryptographic processors, focusing on the steps which are very important for cipher application, such as code transformation and optimization, division and mapping of intermediate representations. Finally, this chapter will give examples about compilation and implementation of different cipher algorithms.

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Authors and Affiliations

  1. Institute of Microelectronics, Tsinghua University, Beijing, China

    Leibo Liu, Bo Wang & Shaojun Wei

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  1. Leibo Liu
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  2. Bo Wang
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  3. Shaojun Wei
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Correspondence to Leibo Liu .

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Liu, L., Wang, B., Wei, S. (2018). Compilation Method of Reconfigurable Cryptographic Processors. In: Reconfigurable Cryptographic Processor. Springer, Singapore. https://doi.org/10.1007/978-981-10-8899-5_4

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  • DOI: https://doi.org/10.1007/978-981-10-8899-5_4

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  • Publisher Name: Springer, Singapore

  • Print ISBN: 978-981-10-8898-8

  • Online ISBN: 978-981-10-8899-5

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