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Design of a New Subthreshold-Level Shifter Using Self-controlled Current Limiter

  • Sheereen SulthanaEmail author
  • K. Ragini
Conference paper
Part of the Lecture Notes in Networks and Systems book series (LNNS, volume 33)

Abstract

This brief presents new design of subthreshold-level shifter capable of converting an input signal from subthreshold voltage of 0.1 V to above threshold voltage of 1.2 V. Level shifter (LS) circuit makes use of a self-controlled current limiter (feedback loop) for shifting the signal by detecting the output error. In addition, the proposed design has ample process-voltage-temperature (PVT) variation tolerance. Simulation results of subthreshold LS design in 65-nm CMOS technology, shows that the circuit can shift the signal with limited delay, static power and energy consumption. Modified Wilson current mirror (MWCM) LS design (extension) is also implemented in 65-nm technology, which shows much improvement in terms of delay, power, and energy consumption compared to subthreshold LS design.

Keywords

Level shifter Low leakage (static) power Current mirrors Subthreshold voltage Wilson current mirror 

References

  1. 1.
    Chavan A, Macdonald E (2008) Ultra low voltage level shifter to interface sub and super threshold reconfigurable logic cells. In: Proceedings of IEEE Aerospace Conference, Big Sky, MT, USA, 2008, pp. 1–6Google Scholar
  2. 2.
    Talebzadeh A, Saberi M (2016) A low-power wide range voltage level shifter using a modified Wilson current mirror. In: Proceedings of ICEE conference, Mashhad, Iran, 2016, pp. 1363–1366Google Scholar
  3. 3.
    Shao H, Tsui C (2007) A robust, input voltage adaptive and low energy consumption level converter for sub-threshold logic. In: Proceedings of 33rd ESSCIRC, 2007, pp. 312–315Google Scholar
  4. 4.
    Hasanbegovic A, Aunet S (2009) Low-power sub threshold to above threshold level shifter in 90 nm process. In: Proceedings of NORCHIP conference, Trondheim, Norway, 2009, pp. 1–4Google Scholar
  5. 5.
    Osaki Y, Hirose T, Kuroki N, Numa M (2012) A low-power level shifter with logic error correction for extremely low-voltage digital CMOS LSIs. J Solid-State Circ 47(7):1776–1783CrossRefGoogle Scholar
  6. 6.
    Wen L, Cheng X, Tian S, Wen H, Zeng X (2016) Sub threshold level shifter with self-controlled current limiter by detecting output error. IEEE Trans Circuits Syst II, Exp Briefs 63(4):346–350CrossRefGoogle Scholar
  7. 7.
    Lukemeier S, Ruckert U (2010) A sub-threshold to above-threshold level shifter comprising a Wilson current mirror. IEEE Trans Circuits Syst II, Exp Briefs 57(9):721–724CrossRefGoogle Scholar
  8. 8.
    Chen TH, Chen J, Clark LT (2006) Subthreshold to above threshold level shifter design. J Low Power Electron 2(2):251–258CrossRefGoogle Scholar
  9. 9.
    Wooters SN, Calhoun BH, Blalcok TH (2010) An energy-efficient sub-threshold level converter in 130-nm CMOS. IEEE Trans Circuits Syst II, Exp Briefs 57(4):290–294CrossRefGoogle Scholar

Copyright information

© Springer Nature Singapore Pte Ltd. 2019

Authors and Affiliations

  1. 1.G. Narayanamma Institute of Technology & Science (for women), JNTUHHyderabadIndia

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